From e7ae96f48834d57fd1a6c8940fa3f64b97520ed9 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Tue, 13 Nov 2012 15:07:45 -0700 Subject: Add Intel Panther Point USB3 initialization Add PEI updates and ACPI updates for supporting EHCI to XHCI USB port support. Change-Id: I9ace68a1b3950771aefb96c1319b8899291edd9a Signed-off-by: Marc Jones Reviewed-on: http://review.coreboot.org/2519 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/southbridge/intel/bd82x6x/nvs.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/southbridge/intel/bd82x6x/nvs.h') diff --git a/src/southbridge/intel/bd82x6x/nvs.h b/src/southbridge/intel/bd82x6x/nvs.h index b8506d4db4..7b8b6c9e9c 100644 --- a/src/southbridge/intel/bd82x6x/nvs.h +++ b/src/southbridge/intel/bd82x6x/nvs.h @@ -113,7 +113,9 @@ typedef struct { u8 gtf2[7]; u8 idem; u8 idet; - u8 rsvd11[7]; + u8 rsvd11[6]; + /* XHCI */ + u8 xhci; /* IGD OpRegion (not implemented yet) */ u32 aslb; /* 0xb4 - IGD OpRegion Base Address */ u8 ibtt; /* 0xb8 - IGD boot type */ -- cgit v1.2.3