From 13f66507afdcde5170546e5ca1ce5a945895eb10 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sun, 3 Mar 2019 08:01:05 +0200
Subject: device/mmio.h: Add include file for MMIO ops
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MMIO operations are arch-agnostic so the include
path should not be arch/.

Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31691
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/southbridge/intel/bd82x6x/azalia.c        | 2 +-
 src/southbridge/intel/bd82x6x/early_pch.c     | 2 +-
 src/southbridge/intel/bd82x6x/early_thermal.c | 2 +-
 src/southbridge/intel/bd82x6x/early_usb.c     | 1 +
 src/southbridge/intel/bd82x6x/me.c            | 2 +-
 src/southbridge/intel/bd82x6x/me_8.x.c        | 2 +-
 src/southbridge/intel/bd82x6x/sata.c          | 2 +-
 src/southbridge/intel/bd82x6x/usb_ehci.c      | 2 +-
 8 files changed, 8 insertions(+), 7 deletions(-)

(limited to 'src/southbridge/intel/bd82x6x')

diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index e960b061cb..0cc9efa133 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -20,7 +20,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <delay.h>
 #include <device/azalia_device.h>
 #include "pch.h"
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index 2e1c5fc2a2..b5fbfbb071 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -14,7 +14,7 @@
  */
 
 #include <string.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <arch/cbfs.h>
 #include <ip_checksum.h>
diff --git a/src/southbridge/intel/bd82x6x/early_thermal.c b/src/southbridge/intel/bd82x6x/early_thermal.c
index f29ba5da6a..63da2d65f4 100644
--- a/src/southbridge/intel/bd82x6x/early_thermal.c
+++ b/src/southbridge/intel/bd82x6x/early_thermal.c
@@ -14,7 +14,7 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include "pch.h"
 #include "cpu/intel/model_206ax/model_206ax.h"
diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c
index a7321c9991..17919af53a 100644
--- a/src/southbridge/intel/bd82x6x/early_usb.c
+++ b/src/southbridge/intel/bd82x6x/early_usb.c
@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index f5516e39e9..58c24784db 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -23,7 +23,7 @@
  */
 
 #include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/pci_ids.h>
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 951c8ab4e4..bdd57cdd33 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -23,7 +23,7 @@
  */
 
 #include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/pci_ids.h>
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index 02d478ccb0..3ee0a5983b 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -14,7 +14,7 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index b4060e526f..e98b8bef7a 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -20,7 +20,7 @@
 #include <device/pci_ids.h>
 #include "pch.h"
 #include <device/pci_ehci.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 
 static void usb_ehci_init(struct device *dev)
-- 
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