From 332f14b60b241d1793401ea50b22785ad81c97cd Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Fri, 5 Sep 2014 16:29:41 +0200 Subject: bd82x6x: Move common bd82x6x S3 detect to bd82x6x code. Change-Id: I9ba1fa5f9ad38cb619466c6199eacd219bc53281 Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/6921 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/southbridge/intel/bd82x6x/early_pch.c | 31 +++++++++++++++++++++++++++++++ src/southbridge/intel/bd82x6x/pch.h | 1 + 2 files changed, 32 insertions(+) (limited to 'src/southbridge/intel/bd82x6x') diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 9f80d41aa4..3438a0ad53 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -20,6 +20,9 @@ #include #include +#include "pch.h" +#include +#include #if CONFIG_COLLECT_TIMESTAMPS tsc_t get_initial_timestamp(void) @@ -31,3 +34,31 @@ tsc_t get_initial_timestamp(void) return base_time; } #endif + + +int southbridge_detect_s3_resume(void) +{ + u32 pm1_cnt; + u16 pm1_sts; + + /* Check PM1_STS[15] to see if we are waking from Sx */ + pm1_sts = inw(DEFAULT_PMBASE + PM1_STS); + + /* Read PM1_CNT[12:10] to determine which Sx state */ + pm1_cnt = inl(DEFAULT_PMBASE + PM1_CNT); + + if ((pm1_sts & WAK_STS) && ((pm1_cnt >> 10) & 7) == 5) { + if (acpi_s3_resume_allowed()) { + printk(BIOS_DEBUG, "Resume from S3 detected.\n"); + /* Clear SLP_TYPE. This will break stage2 but + * we care for that when we get there. + */ + outl(pm1_cnt & ~(7 << 10), DEFAULT_PMBASE + PM1_CNT); + return 1; + } else { + printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n"); + } + } + + return 0; +} diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 83128e2540..aabf617d3a 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -76,6 +76,7 @@ int smbus_read_byte(unsigned device, unsigned address); int early_spi_read(u32 offset, u32 size, u8 *buffer); void early_thermal_init(void); void early_pch_init_native(void); +int southbridge_detect_s3_resume(void); #endif #endif -- cgit v1.2.3