From 546953c0c553465761705fb0747964c08d634461 Mon Sep 17 00:00:00 2001
From: Patrick Georgi <pgeorgi@google.com>
Date: Sat, 29 Nov 2014 10:38:17 +0100
Subject: Replace hlt with halt()

There were instances of unneeded arch/hlt.h includes,
various hlt() calls that weren't supposed to exit (but
might have) and various forms of endless loops around
hlt() calls.

All these are sorted out now: unnecessary includes are
dropped, hlt() is uniformly replaced with halt() (except
in assembly, obviously).

Change-Id: I3d38fed6e8d67a28fdeb17be803d8c4b62d383c5
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7608
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
 src/southbridge/intel/bd82x6x/early_me.c         | 4 ++--
 src/southbridge/intel/bd82x6x/early_me_native.c  | 6 +++---
 src/southbridge/intel/bd82x6x/early_pch_native.c | 1 -
 src/southbridge/intel/bd82x6x/me.c               | 4 ++--
 src/southbridge/intel/bd82x6x/me_8.x.c           | 4 ++--
 src/southbridge/intel/bd82x6x/smihandler.c       | 4 ++--
 6 files changed, 11 insertions(+), 12 deletions(-)

(limited to 'src/southbridge/intel/bd82x6x')

diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c
index 670e1cedf5..eac0e343bf 100644
--- a/src/southbridge/intel/bd82x6x/early_me.c
+++ b/src/southbridge/intel/bd82x6x/early_me.c
@@ -19,11 +19,11 @@
  * MA 02110-1301 USA
  */
 
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/pci_ids.h>
+#include <halt.h>
 #include <string.h>
 #include "me.h"
 #include "pch.h"
@@ -194,7 +194,7 @@ int intel_early_me_init_done(u8 status)
 	/* Perform the requested reset */
 	if (reset) {
 		outb(reset, 0xcf9);
-		hlt();
+		halt();
 	}
 	return -1;
 }
diff --git a/src/southbridge/intel/bd82x6x/early_me_native.c b/src/southbridge/intel/bd82x6x/early_me_native.c
index f327aec8c5..15e40871a9 100644
--- a/src/southbridge/intel/bd82x6x/early_me_native.c
+++ b/src/southbridge/intel/bd82x6x/early_me_native.c
@@ -19,11 +19,11 @@
  * MA 02110-1301 USA
  */
 
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/pci_ids.h>
+#include <halt.h>
 #include <string.h>
 #include "me.h"
 #include "pch.h"
@@ -184,7 +184,7 @@ int intel_early_me_init_done(u8 status)
 			pcie_write_config16(PCI_DEV(0, 31, 0), 0xa2, reg16);
 			set_global_reset(0);
 			outb(0x6, 0xcf9);
-			hlt();
+			halt();
 		}
 
 		if (((me_fws2 & 0x10) == 0x10) && (me_fws2 & 0x80) == 0x00) {
@@ -266,7 +266,7 @@ int intel_early_me_init_done(u8 status)
 	/* Perform the requested reset */
 	if (reset) {
 		outb(reset, 0xcf9);
-		hlt();
+		halt();
 	}
 	return -1;
 }
diff --git a/src/southbridge/intel/bd82x6x/early_pch_native.c b/src/southbridge/intel/bd82x6x/early_pch_native.c
index 5cd6315430..0863f3462c 100644
--- a/src/southbridge/intel/bd82x6x/early_pch_native.c
+++ b/src/southbridge/intel/bd82x6x/early_pch_native.c
@@ -19,7 +19,6 @@
 
 #include <console/console.h>
 #include <string.h>
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <cbmem.h>
 #include <arch/cbfs.h>
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index 44c72733dc..901e71dd5e 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -28,7 +28,6 @@
  */
 
 #include <arch/acpi.h>
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <device/pci_ids.h>
@@ -36,6 +35,7 @@
 #include <string.h>
 #include <delay.h>
 #include <elog.h>
+#include <halt.h>
 
 #ifdef __SMM__
 #include <arch/pci_mmio_cfg.h>
@@ -486,7 +486,7 @@ int mkhi_global_reset(void)
 	/* Send request and wait for response */
 	if (mei_sendrecv(&mei, &mkhi, &reset, NULL, 0) < 0) {
 		/* No response means reset will happen shortly... */
-		hlt();
+		halt();
 	}
 
 	/* If the ME responded it rejected the reset request */
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 2dc83f708a..e25b3b8c4f 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -28,7 +28,6 @@
  */
 
 #include <arch/acpi.h>
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <device/pci_ids.h>
@@ -36,6 +35,7 @@
 #include <string.h>
 #include <delay.h>
 #include <elog.h>
+#include <halt.h>
 
 #ifdef __SMM__
 #include <arch/pci_mmio_cfg.h>
@@ -452,7 +452,7 @@ static int mkhi_global_reset(void)
 	printk(BIOS_NOTICE, "ME: %s\n", __FUNCTION__);
 	if (mei_sendrecv(&mei, &mkhi, &reset, NULL, 0) < 0) {
 		/* No response means reset will happen shortly... */
-		hlt();
+		halt();
 	}
 
 	/* If the ME responded it rejected the reset request */
diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c
index f886ad4432..1b8810f368 100644
--- a/src/southbridge/intel/bd82x6x/smihandler.c
+++ b/src/southbridge/intel/bd82x6x/smihandler.c
@@ -20,13 +20,13 @@
  */
 
 #include <types.h>
-#include <arch/hlt.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <device/pci_def.h>
 #include <cpu/x86/smm.h>
 #include <elog.h>
+#include <halt.h>
 #include <pc80/mc146818rtc.h>
 #include "pch.h"
 
@@ -474,7 +474,7 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat
 
 	/* Make sure to stop executing code here for S3/S4/S5 */
 	if (slp_typ > 1)
-		hlt();
+		halt();
 
 	/* In most sleep states, the code flow of this function ends at
 	 * the line above. However, if we entered sleep state S1 and wake
-- 
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