From 6a00113de8b9060a7227bcfa79b3786e3e592a33 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Thu, 13 Jul 2017 02:20:27 +0200 Subject: Rename __attribute__((packed)) --> __packed Also unify __attribute__ ((..)) to __attribute__((..)) and handle ((__packed__)) like ((packed)) Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c Signed-off-by: Stefan Reinauer Reviewed-on: https://review.coreboot.org/15921 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/southbridge/intel/fsp_rangeley/gpio.h | 6 ++++-- src/southbridge/intel/fsp_rangeley/nvs.h | 4 +++- src/southbridge/intel/fsp_rangeley/spi.c | 7 ++++--- 3 files changed, 11 insertions(+), 6 deletions(-) (limited to 'src/southbridge/intel/fsp_rangeley') diff --git a/src/southbridge/intel/fsp_rangeley/gpio.h b/src/southbridge/intel/fsp_rangeley/gpio.h index 8a0b578fe0..d8fbcb985d 100644 --- a/src/southbridge/intel/fsp_rangeley/gpio.h +++ b/src/southbridge/intel/fsp_rangeley/gpio.h @@ -17,6 +17,8 @@ #ifndef INTEL_RANGELEY_GPIO_H #define INTEL_RANGELEY_GPIO_H +#include + #define GPIO_MODE_NATIVE 0 #define GPIO_MODE_GPIO 1 #define GPIO_MODE_NONE 1 @@ -72,14 +74,14 @@ struct soc_gpio { u32 gpio29 : 1; u32 gpio30 : 1; u32 gpio31 : 1; -} __attribute__ ((packed)); +} __packed; struct soc_cfio { u32 pad_conf_0; u32 pad_conf_1; u32 pad_val; u32 pad_dft; -} __attribute__ ((packed)); +} __packed; struct soc_gpio_map { /* GPIO core */ diff --git a/src/southbridge/intel/fsp_rangeley/nvs.h b/src/southbridge/intel/fsp_rangeley/nvs.h index 5449f9457f..fd3329051d 100644 --- a/src/southbridge/intel/fsp_rangeley/nvs.h +++ b/src/southbridge/intel/fsp_rangeley/nvs.h @@ -14,6 +14,8 @@ * GNU General Public License for more details. */ +#include + typedef struct { /* Miscellaneous */ u16 osys; /* 0x00 - Operating System */ @@ -143,7 +145,7 @@ typedef struct { u8 mmio; /* 0xf4 - 64bit mmio support */ u8 rsvd13[11]; /* 0xf5 - rsvd */ -} __attribute__((packed)) global_nvs_t; +} __packed global_nvs_t; void acpi_create_gnvs(global_nvs_t *gnvs); #ifdef __SMM__ diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c index 39d67c52d5..db84914070 100644 --- a/src/southbridge/intel/fsp_rangeley/spi.c +++ b/src/southbridge/intel/fsp_rangeley/spi.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -73,7 +74,7 @@ typedef struct ich7_spi_regs { uint16_t preop; uint16_t optype; uint8_t opmenu[8]; -} __attribute__((packed)) ich7_spi_regs; +} __packed ich7_spi_regs; typedef struct ich9_spi_regs { uint32_t bfpr; // 0 @@ -106,7 +107,7 @@ typedef struct ich9_spi_regs { uint32_t srdl; uint32_t srdc; uint32_t srd; -} __attribute__((packed)) ich9_spi_regs; +} __packed ich9_spi_regs; typedef struct ich10_spi_regs { uint32_t bfpr; @@ -138,7 +139,7 @@ typedef struct ich10_spi_regs { uint32_t scs; uint32_t bcr; uint32_t tcgc; -} __attribute__((packed)) ich10_spi_regs; +} __packed ich10_spi_regs; typedef struct ich_spi_controller { int locked; -- cgit v1.2.3