From 4e22a3bc58e1b911387947b2e0e7a73176dd2d83 Mon Sep 17 00:00:00 2001 From: Tobias Diedrich Date: Mon, 13 Dec 2010 22:39:46 +0100 Subject: Add acpi_get_sleep_type() to i82371eb and P2B _PTS/_WAK methods Build fix for src/arch/i386/boot/acpi.c if !CONFIG_SMP Also check for acpi_slp_type 2 in acpi_is_wakeup, since S2 uses the same acpi wakeup vector as S3. Add _PTS/_WAK methods to turn off/on the CPU/case fans and blink the power LED while sleeping. acpi_get_sleep_type() is in a seperate file i82371eb_wakeup.c because it is used in both romstage and ramstage after patch 3/3, whereas i82371eb_early_pm.c is used only in romstage. I used the name acpi_get_sleep_type instead of acpi_is_wakeup_early because I think acpi_is_wakeup_early is a bit misleading as a name since it doesn't return a boolean value. Other chipsets so far only ever set acpi_slp_type to 0 and 3, so the added check for acpi_slp_type == 2 (resume from S2) should not change behaviour of other boards: northbridge/intel/i945/northbridge.c:256:extern u8 acpi_slp_type; northbridge/intel/i945/northbridge.c:263: acpi_slp_type=0; northbridge/intel/i945/northbridge.c:267: acpi_slp_type=3; northbridge/intel/i945/northbridge.c:271: acpi_slp_type=0; southbridge/intel/i82801gx/i82801gx_lpc.c:171:extern u8 acpi_slp_type; southbridge/via/vt8237r/vt8237r_lpc.c:149:extern u8 acpi_slp_type; southbridge/via/vt8237r/vt8237r_lpc.c:238: acpi_slp_type = ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0 ; southbridge/via/vt8237r/vt8237r_lpc.c:239: printk(BIOS_DEBUG, "SLP_TYP type was %x %x\n", tmp, acpi_slp_type); Change-Id: I13feff0b8f49aa988e5467cdbef02981f0a6be8a Signed-off-by: Tobias Diedrich Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/188 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/southbridge/intel/i82371eb/smbus.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'src/southbridge/intel/i82371eb/smbus.c') diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c index b1a51c6a8a..65af02abb0 100644 --- a/src/southbridge/intel/i82371eb/smbus.c +++ b/src/southbridge/intel/i82371eb/smbus.c @@ -31,6 +31,11 @@ #include "i82371eb.h" #include "smbus.h" +#if CONFIG_HAVE_ACPI_RESUME == 1 +extern u8 acpi_slp_type; +int acpi_get_sleep_type(void); +#endif + static void pwrmgt_enable(struct device *dev) { struct southbridge_intel_i82371eb_config *sb = dev->chip_info; @@ -87,7 +92,13 @@ static void pwrmgt_enable(struct device *dev) outw(0xffff, DEFAULT_PMBASE + GLBSTS); outl(0xffffffff, DEFAULT_PMBASE + DEVSTS); - /* set pmcntrl default */ +#if CONFIG_HAVE_ACPI_RESUME == 1 + /* this reads PMCNTRL, so we have to call it before writing the + * default value */ + acpi_slp_type = acpi_get_sleep_type(); +#endif + + /* set PMCNTRL default */ outw(SUS_TYP_S0|SCI_EN, DEFAULT_PMBASE + PMCNTRL); } -- cgit v1.2.3