From f555a58abc487270d4ba42527b1b43850bd718c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 6 Jan 2020 19:41:42 +0200 Subject: sb/intel/common: Declare common smbus_base() and enable_smbus() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This avoids including platform-specific headers with different filenames from common code. Change-Id: Idf9893e55949d63f3ceca2249e618d0f81320321 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/38232 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/southbridge/intel/i82371eb/early_smbus.c | 14 ++++++++------ src/southbridge/intel/i82371eb/i82371eb.h | 1 - 2 files changed, 8 insertions(+), 7 deletions(-) (limited to 'src/southbridge/intel/i82371eb') diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c index f69cb93a74..671bfc5854 100644 --- a/src/southbridge/intel/i82371eb/early_smbus.c +++ b/src/southbridge/intel/i82371eb/early_smbus.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -29,7 +28,12 @@ void i82371eb_early_init(void) enable_pm(); } -void enable_smbus(void) +uintptr_t smbus_base(void) +{ + return SMBUS_IO_BASE; +} + +int smbus_enable_iobar(uintptr_t base) { pci_devfn_t dev; u8 reg8; @@ -40,7 +44,7 @@ void enable_smbus(void) PCI_DEVICE_ID_INTEL_82371AB_SMB_ACPI), 0); /* Set the SMBus I/O base. */ - pci_write_config32(dev, SMBBA, SMBUS_IO_BASE | 1); + pci_write_config32(dev, SMBBA, base | 1); /* Enable the SMBus controller host interface. */ reg8 = pci_read_config8(dev, SMBHSTCFG); @@ -52,9 +56,7 @@ void enable_smbus(void) reg16 |= PCI_COMMAND_IO; pci_write_config16(dev, PCI_COMMAND, reg16); - smbus_host_reset(SMBUS_IO_BASE); - - printk(BIOS_DEBUG, "SMBus controller enabled\n"); + return 0; } int smbus_read_byte(u8 device, u8 address) diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index b292beb173..2b530102e3 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -19,7 +19,6 @@ #if !defined(__ACPI__) -void enable_smbus(void); void enable_pm(void); void i82371eb_early_init(void); -- cgit v1.2.3