From 706aed8eb9c1836d1b6c53b081f789a1d3afaa25 Mon Sep 17 00:00:00 2001 From: "Steven J. Magnani" Date: Wed, 14 Sep 2005 15:34:03 +0000 Subject: Initial revision. Based on i82801er and LB v1 code. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/i82801ca/cmos_failover.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 src/southbridge/intel/i82801ca/cmos_failover.c (limited to 'src/southbridge/intel/i82801ca/cmos_failover.c') diff --git a/src/southbridge/intel/i82801ca/cmos_failover.c b/src/southbridge/intel/i82801ca/cmos_failover.c new file mode 100644 index 0000000000..6197ef677a --- /dev/null +++ b/src/southbridge/intel/i82801ca/cmos_failover.c @@ -0,0 +1,19 @@ +//kind of cmos_err for ich3 + +#include "i82801ca.h" + +static void check_cmos_failed(void) +{ +#if HAVE_OPTION_TABLE + uint8_t byte = pci_read_config8(PCI_DEV(0,0x1f,0),GEN_PMCON_3); + + if( byte & RTC_BATTERY_DEAD) { + // Set boot_option and last_boot to 'Fallback', + // clear reboot_bits + byte = cmos_read(RTC_BOOT_BYTE); + byte &= 0x0c; + byte |= MAX_REBOOT_CNT << 4; + cmos_write(byte, RTC_BOOT_BYTE); + } +#endif +} -- cgit v1.2.3