From 5c32d242e475bcc40a92538efc4ac0fa9d21c7af Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 17 Mar 2010 03:40:23 +0000 Subject: bug fix for IOAPIC on i82801dx. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/i82801dx/i82801dx_lpc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/southbridge/intel/i82801dx') diff --git a/src/southbridge/intel/i82801dx/i82801dx_lpc.c b/src/southbridge/intel/i82801dx/i82801dx_lpc.c index 99456bae9a..0aff9f4560 100644 --- a/src/southbridge/intel/i82801dx/i82801dx_lpc.c +++ b/src/southbridge/intel/i82801dx/i82801dx_lpc.c @@ -38,8 +38,8 @@ typedef struct southbridge_intel_i82801dx_config config_t; static void i82801dx_enable_ioapic(struct device *dev) { u32 reg32; - volatile u32 *ioapic_index = (volatile u32 *)IO_APIC_ADDR; - volatile u32 *ioapic_data = (volatile u32 *)IO_APIC_ADDR + 0x10; + volatile u32 *ioapic_index = (volatile u32 *)(IO_APIC_ADDR); + volatile u32 *ioapic_data = (volatile u32 *)(IO_APIC_ADDR + 0x10); /* Set ACPI base address (I/O space). */ pci_write_config32(dev, PMBASE, (PMBASE_ADDR | 1)); -- cgit v1.2.3