From caaf0bf483288ea092d721954df0407930c67fc8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 6 Jun 2013 10:21:28 +0300 Subject: usbdebug: Support i82801dx/ex southbridge MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested on i82801dx system with board aopen/dxplplusu. Change-Id: I522455ac79c87b9b6fc9cd8c4dc0da3563dfbfad Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/3381 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Paul Menzel --- src/southbridge/intel/i82801ex/Kconfig | 12 ++++++++++++ src/southbridge/intel/i82801ex/ehci.c | 3 ++- 2 files changed, 14 insertions(+), 1 deletion(-) (limited to 'src/southbridge/intel/i82801ex') diff --git a/src/southbridge/intel/i82801ex/Kconfig b/src/southbridge/intel/i82801ex/Kconfig index 23a68b8b97..b1d7dbb478 100644 --- a/src/southbridge/intel/i82801ex/Kconfig +++ b/src/southbridge/intel/i82801ex/Kconfig @@ -2,4 +2,16 @@ config SOUTHBRIDGE_INTEL_I82801EX bool select IOAPIC select HAVE_HARD_RESET + select HAVE_USBDEBUG +if SOUTHBRIDGE_INTEL_I82801EX + +config EHCI_BAR + hex + default 0xfef00000 + +config EHCI_DEBUG_OFFSET + hex + default 0xa0 + +endif diff --git a/src/southbridge/intel/i82801ex/ehci.c b/src/southbridge/intel/i82801ex/ehci.c index 8ae921d194..045840a82b 100644 --- a/src/southbridge/intel/i82801ex/ehci.c +++ b/src/southbridge/intel/i82801ex/ehci.c @@ -3,6 +3,7 @@ #include #include #include +#include #include "i82801ex.h" static void ehci_init(struct device *dev) @@ -34,7 +35,7 @@ static struct pci_operations lops_pci = { .set_subsystem = &ehci_set_subsystem, }; static struct device_operations ehci_ops = { - .read_resources = pci_dev_read_resources, + .read_resources = pci_ehci_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = ehci_init, -- cgit v1.2.3