From ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 31 Aug 2016 19:22:16 +0200 Subject: src/southbridge: Code formating Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/16291 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/southbridge/intel/i82801gx/smbus.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/southbridge/intel/i82801gx/smbus.c') diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c index 913f68f74b..e6aa01885a 100644 --- a/src/southbridge/intel/i82801gx/smbus.c +++ b/src/southbridge/intel/i82801gx/smbus.c @@ -123,7 +123,7 @@ static int do_smbus_block_write(unsigned smbus_base, unsigned device, outb((inb(smbus_base + SMBHSTCTL) | 0x40), smbus_base + SMBHSTCTL); - while(!(inb(smbus_base + SMBHSTSTAT) & 1)); + while (!(inb(smbus_base + SMBHSTSTAT) & 1)); /* Poll for transaction completion */ do { status = inb(smbus_base + SMBHSTSTAT); @@ -136,7 +136,7 @@ static int do_smbus_block_write(unsigned smbus_base, unsigned device, outb(*buf++, smbus_base + SMBBLKDAT); outb(status, smbus_base + SMBHSTSTAT); } - } while(status & 0x01); + } while (status & 0x01); return 0; } @@ -180,7 +180,7 @@ static int do_smbus_block_read(unsigned smbus_base, unsigned device, outb((inb(smbus_base + SMBHSTCTL) | 0x40), smbus_base + SMBHSTCTL); - while(!(inb(smbus_base + SMBHSTSTAT) & 1)); + while (!(inb(smbus_base + SMBHSTSTAT) & 1)); /* Poll for transaction completion */ do { status = inb(smbus_base + SMBHSTSTAT); @@ -200,7 +200,7 @@ static int do_smbus_block_read(unsigned smbus_base, unsigned device, smbus_base + SMBHSTCTL); } } - } while(status & 0x01); + } while (status & 0x01); return bytes_read; } -- cgit v1.2.3