From 9aeb69447d3839675b2cac51c3e95a4724fd9b0d Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Fri, 5 Oct 2012 21:54:38 +0200 Subject: hpet: common ACPI generation HPET's min ticks (minimum time between events to avoid losing interrupts) is chipset specific, so move it to Kconfig. Via also has a special base address, so move it as well. Apart from these (and the base address was already #defined), the table is very uniform. Change-Id: I848a2e2b0b16021c7ee5ba99097fa6a5886c3286 Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/1562 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: Dave Frodin --- src/southbridge/intel/i82801gx/Kconfig | 5 ++++- src/southbridge/intel/i82801gx/i82801gx.h | 1 - 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'src/southbridge/intel/i82801gx') diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 3550954583..4937df7096 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -41,7 +41,10 @@ config USBDEBUG_DEFAULT_PORT config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/intel/i82801gx/bootblock.c" - depends on SOUTHBRIDGE_INTEL_I82801GX + +config HPET_MIN_TICKS + hex + default 0x80 endif diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 8fb5b92f43..566311f55f 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -32,7 +32,6 @@ #define DEFAULT_GPIOBASE 0x0480 #define DEFAULT_PMBASE 0x0500 -#define HPET_ADDR 0xfed00000 #define DEFAULT_RCBA 0xfed1c000 #ifndef __ACPI__ -- cgit v1.2.3