From 7cdcc38f292d7a8ffd285d17c848e60e41eec759 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 6 Jan 2020 19:00:31 +0200 Subject: sb/intel/common: Add smbus_host_reset() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I3f6000df391295e2c0ce910a2a919a1dd3333519 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/38229 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/southbridge/intel/i82801ix/early_smbus.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'src/southbridge/intel/i82801ix') diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c index e067733a55..4286760a7e 100644 --- a/src/southbridge/intel/i82801ix/early_smbus.c +++ b/src/southbridge/intel/i82801ix/early_smbus.c @@ -15,12 +15,10 @@ * GNU General Public License for more details. */ -#include #include #include #include #include -#include #include #include "i82801ix.h" @@ -45,11 +43,8 @@ void enable_smbus(void) /* Set SMBus I/O space enable. */ pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO); - /* Disable interrupt generation. */ - outb(0, SMBUS_IO_BASE + SMBHSTCTL); + smbus_host_reset(SMBUS_IO_BASE); - /* Clear any lingering errors, so transactions can run. */ - outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); printk(BIOS_DEBUG, "SMBus controller enabled.\n"); } -- cgit v1.2.3