From 27387c3cf5c681b1f52fd45ebe232df593e5d052 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 21 Jun 2020 16:18:27 +0200 Subject: sb/intel/i82801jx: Drop `c3_latency` The three mainboards using this southbridge do not define it. Note that the default value of zero might be wrong, so add a FIXME comment. Change-Id: Id16bb12a4628daf311bddf7e4701fc480d6b18e5 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/42656 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes Reviewed-by: Nico Huber --- src/southbridge/intel/i82801jx/fadt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/southbridge/intel/i82801jx/fadt.c') diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c index f2b408b119..d99872d396 100644 --- a/src/southbridge/intel/i82801jx/fadt.c +++ b/src/southbridge/intel/i82801jx/fadt.c @@ -36,7 +36,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 16; fadt->p_lvl2_lat = 1; - fadt->p_lvl3_lat = chip->c3_latency; + fadt->p_lvl3_lat = 0; /* FIXME: Is this correct? */ fadt->duty_offset = 1; fadt->duty_width = 0; fadt->day_alrm = 0xd; -- cgit v1.2.3