From 12b121cdb450d96309dd96b2ccc25fc5501d2250 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sun, 18 Aug 2019 16:33:39 +0300
Subject: southbridge/intel: Tidy up preprocessor and headers
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Change-Id: I52a7b39566acd64ac21a345046675e05649a40f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34980
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/southbridge/intel/i82801jx/hdaudio.c  |  1 +
 src/southbridge/intel/i82801jx/i82801jx.c |  1 +
 src/southbridge/intel/i82801jx/i82801jx.h | 10 +---------
 src/southbridge/intel/i82801jx/lpc.c      |  1 +
 src/southbridge/intel/i82801jx/sata.c     |  1 +
 5 files changed, 5 insertions(+), 9 deletions(-)

(limited to 'src/southbridge/intel/i82801jx')

diff --git a/src/southbridge/intel/i82801jx/hdaudio.c b/src/southbridge/intel/i82801jx/hdaudio.c
index c2a505b613..0628c435a9 100644
--- a/src/southbridge/intel/i82801jx/hdaudio.c
+++ b/src/southbridge/intel/i82801jx/hdaudio.c
@@ -23,6 +23,7 @@
 #include <device/mmio.h>
 #include <delay.h>
 #include <device/azalia_device.h>
+#include "chip.h"
 #include "i82801jx.h"
 
 #define HDA_ICII_REG 0x68
diff --git a/src/southbridge/intel/i82801jx/i82801jx.c b/src/southbridge/intel/i82801jx/i82801jx.c
index ec5576d381..490ece73f0 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.c
+++ b/src/southbridge/intel/i82801jx/i82801jx.c
@@ -22,6 +22,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <console/console.h>
+#include "chip.h"
 #include "i82801jx.h"
 
 typedef struct southbridge_intel_i82801jx_config config_t;
diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h
index 80d6cbd04f..28c9f68ea2 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.h
+++ b/src/southbridge/intel/i82801jx/i82801jx.h
@@ -18,12 +18,6 @@
 #ifndef SOUTHBRIDGE_INTEL_I82801GX_I82801JX_H
 #define SOUTHBRIDGE_INTEL_I82801GX_I82801JX_H
 
-#ifndef __ACPI__
-#ifndef __ASSEMBLER__
-#include "chip.h"
-#endif
-#endif
-
 #define DEFAULT_TBAR		((u8 *)0xfed1b000)
 
 #include <southbridge/intel/common/rcba.h>
@@ -222,7 +216,6 @@
 
 
 #ifndef __ACPI__
-#ifndef __ASSEMBLER__
 
 #include <device/pci_ops.h>
 
@@ -232,7 +225,7 @@ static inline int lpc_is_mobile(const u16 devid)
 }
 #define LPC_IS_MOBILE(dev) lpc_is_mobile(pci_read_config16(dev, PCI_DEVICE_ID))
 
-#if defined(__PRE_RAM__)
+#if ENV_ROMSTAGE
 void enable_smbus(void);
 int smbus_read_byte(unsigned device, unsigned address);
 int i2c_eeprom_read(unsigned int device, unsigned int cmd, unsigned int bytes,
@@ -242,7 +235,6 @@ int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes,
 		const u8 *buf);
 #endif
 
-#endif
 #endif
 
 #endif
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 0fcb521430..6c63186336 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -31,6 +31,7 @@
 #include <arch/smp/mpspec.h>
 #include <cbmem.h>
 #include <string.h>
+#include "chip.h"
 #include "i82801jx.h"
 #include "nvs.h"
 #include <southbridge/intel/common/pciehp.h>
diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c
index ddaa783868..e6e08a31a4 100644
--- a/src/southbridge/intel/i82801jx/sata.c
+++ b/src/southbridge/intel/i82801jx/sata.c
@@ -25,6 +25,7 @@
 #include <pc80/mc146818rtc.h>
 #include <types.h>
 
+#include "chip.h"
 #include "i82801jx.h"
 
 typedef struct southbridge_intel_i82801jx_config config_t;
-- 
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