From bde6d309dfafe58732ec46314a2d4c08974b62d4 Mon Sep 17 00:00:00 2001 From: Kevin Paul Herbert Date: Wed, 24 Dec 2014 18:43:20 -0800 Subject: x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins) --- src/southbridge/intel/ibexpeak/early_thermal.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'src/southbridge/intel/ibexpeak/early_thermal.c') diff --git a/src/southbridge/intel/ibexpeak/early_thermal.c b/src/southbridge/intel/ibexpeak/early_thermal.c index d23749e513..e765943b24 100644 --- a/src/southbridge/intel/ibexpeak/early_thermal.c +++ b/src/southbridge/intel/ibexpeak/early_thermal.c @@ -43,11 +43,12 @@ void early_thermal_init(void) /* Perform init. */ /* Configure TJmax. */ msr = rdmsr(MSR_TEMPERATURE_TARGET); - write16(0x40000012, ((msr.lo >> 16) & 0xff) << 6); + write16((u16 *)0x40000012, ((msr.lo >> 16) & 0xff) << 6); /* Northbridge temperature slope and offset. */ - write16(0x40000016, 0x7746); + write16((u16 *)0x40000016, 0x7746); /* Enable thermal data reporting, processor, PCH and northbridge. */ - write16(0x4000001a, (read16(0x4000001a) & ~0xf) | 0x10f0); + write16((u16 *)0x4000001a, + (read16((u16 *)0x4000001a) & ~0xf) | 0x10f0); /* Disable temporary BAR. */ pci_write_config32(dev, 0x40, -- cgit v1.2.3