From 2878c0b6dcc4d0dd9e0823cb63e9258f8b3655dc Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 14 Oct 2019 18:42:00 +0200 Subject: nb/intel/nehalem: use pmclib to detect S3 resume During the raminit the CPU gets reset, so reprogram those bits in PM1_CNT such that the CPU remains aware that this is a S3 resume path after the reset. Change-Id: I8f5cafa235c8ab0d0a59fbeeee3465ebca4cc5d0 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36038 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/southbridge/intel/ibexpeak/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge/intel/ibexpeak') diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index 53240cb1df..5757a49a50 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -33,6 +33,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_SMM + select SOUTHBRIDGE_INTEL_COMMON_PMCLIB select HAVE_USBDEBUG_OPTIONS select COMMON_FADT select ACPI_SATA_GENERATOR -- cgit v1.2.3