From 38f1d13a755548ee8afaf9b5e19d8b6709b9e55d Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 17 Sep 2018 08:44:18 +0200 Subject: src/{sb/intel,mb/google/auron}: Don't use device_t Use of device_t is deprecated. Change-Id: I564319506870f75eab58cce535d4e3535a64a993 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/28642 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/southbridge/intel/lynxpoint/pch.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/southbridge/intel/lynxpoint/pch.c') diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c index 1a390cca42..cb01de7496 100644 --- a/src/southbridge/intel/lynxpoint/pch.c +++ b/src/southbridge/intel/lynxpoint/pch.c @@ -80,7 +80,7 @@ u16 get_gpiobase(void) #ifndef __SMM__ /* Put device in D3Hot Power State */ -static void pch_enable_d3hot(device_t dev) +static void pch_enable_d3hot(struct device *dev) { u32 reg32 = pci_read_config32(dev, PCH_PCS); reg32 |= PCH_PCS_PS_D3HOT; @@ -88,7 +88,7 @@ static void pch_enable_d3hot(device_t dev) } /* Set bit in Function Disble register to hide this device */ -void pch_disable_devfn(device_t dev) +void pch_disable_devfn(struct device *dev) { switch (dev->path.pci.devfn) { case PCI_DEVFN(19, 0): /* Audio DSP */ @@ -285,7 +285,7 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue) pch_iobp_write(address, data); } -void pch_enable(device_t dev) +void pch_enable(struct device *dev) { u32 reg32; -- cgit v1.2.3