From be61a173512ece32de01562995a91fbbf3f5b335 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Sat, 18 Dec 2010 07:48:43 +0000 Subject: Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board which uses it. Compiles, but not boot tested lately. Many things missing (eg. SMM support, proper ACPI, ...) Signed-off-by: Patrick Georgi Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/sch/south.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 src/southbridge/intel/sch/south.c (limited to 'src/southbridge/intel/sch/south.c') diff --git a/src/southbridge/intel/sch/south.c b/src/southbridge/intel/sch/south.c new file mode 100644 index 0000000000..e7c283f9a8 --- /dev/null +++ b/src/southbridge/intel/sch/south.c @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include + +struct chip_operations southbridge_intel_sch_ops = { + CHIP_NAME("Intel SCH Southbridge") +}; + -- cgit v1.2.3