From 3139c8dc05a363810b4dd9c45f01667760e22a58 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 28 Jun 2020 16:33:33 +0300 Subject: ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allocation now happens prior to device enumeration. The step cbmem_add() is a no-op here, if reached for some boards. The memset() here is also redundant and becomes harmful with followup works, as it would wipe out the CBMEM console and ChromeOS related fields without them being set again. Change-Id: I9b2625af15cae90b9c1eb601e606d0430336609f Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/48701 Reviewed-by: Lance Zhao Reviewed-by: Angel Pons Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/southbridge/intel/bd82x6x/lpc.c | 8 ++++++-- src/southbridge/intel/i82371eb/acpi_tables.c | 6 ++++++ src/southbridge/intel/i82801dx/fadt.c | 6 ++++++ src/southbridge/intel/i82801gx/lpc.c | 8 ++++++-- src/southbridge/intel/i82801ix/lpc.c | 8 ++++++-- src/southbridge/intel/i82801jx/lpc.c | 8 ++++++-- src/southbridge/intel/ibexpeak/lpc.c | 8 ++++++-- src/southbridge/intel/lynxpoint/lpc.c | 17 +++++------------ 8 files changed, 47 insertions(+), 22 deletions(-) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 4515261ad2..0a99d80620 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -642,12 +642,16 @@ static void pch_lpc_enable(struct device *dev) pch_enable(dev); } +size_t gnvs_size_of_array(void) +{ + return sizeof(struct global_nvs); +} + void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); + struct global_nvs *gnvs = acpi_get_gnvs(); if (gnvs) { - memset(gnvs, 0, sizeof(*gnvs)); acpi_create_gnvs(gnvs); diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c index 7507cd5d5d..433555d8c4 100644 --- a/src/southbridge/intel/i82371eb/acpi_tables.c +++ b/src/southbridge/intel/i82371eb/acpi_tables.c @@ -2,6 +2,7 @@ #include #include +#include #include #include #include "i82371eb.h" @@ -44,3 +45,8 @@ unsigned long acpi_fill_mcfg(unsigned long current) /* chipset doesn't have mmconfig */ return current; } + +size_t gnvs_size_of_array(void) +{ + return 0; +} diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c index 84ea73ad9c..66aa3f1ba9 100644 --- a/src/southbridge/intel/i82801dx/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -2,6 +2,7 @@ #include #include +#include #include /* FIXME: This needs to go into a separate .h file @@ -79,3 +80,8 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.addrl = pmbase + 0x28; fadt->x_gpe0_blk.addrh = 0x0; } + +size_t gnvs_size_of_array(void) +{ + return 0; +} diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 4db93511fc..3a89fbec58 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -479,12 +479,16 @@ static void lpc_final(struct device *dev) outb(POST_OS_BOOT, 0x80); } +size_t gnvs_size_of_array(void) +{ + return sizeof(struct global_nvs); +} + void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); + struct global_nvs *gnvs = acpi_get_gnvs(); if (gnvs) { - memset(gnvs, 0, sizeof(*gnvs)); gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 821a0b7386..c4712baf66 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -453,12 +453,16 @@ static void i82801ix_lpc_read_resources(struct device *dev) res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } +size_t gnvs_size_of_array(void) +{ + return sizeof(struct global_nvs); +} + void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); + struct global_nvs *gnvs = acpi_get_gnvs(); if (gnvs) { - memset(gnvs, 0, sizeof(*gnvs)); acpi_create_gnvs(gnvs); diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index ad9bac1da6..0cc147d2ba 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -477,12 +477,16 @@ static void i82801jx_lpc_read_resources(struct device *dev) } } +size_t gnvs_size_of_array(void) +{ + return sizeof(struct global_nvs); +} + void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); + struct global_nvs *gnvs = acpi_get_gnvs(); if (gnvs) { - memset(gnvs, 0, sizeof(*gnvs)); acpi_create_gnvs(gnvs); diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 0895dddec5..4f9a996a16 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -542,12 +542,16 @@ static void pch_lpc_enable(struct device *dev) pch_enable(dev); } +size_t gnvs_size_of_array(void) +{ + return sizeof(struct global_nvs); +} + void southbridge_inject_dsdt(const struct device *dev) { - struct global_nvs *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); + struct global_nvs *gnvs = acpi_get_gnvs(); if (gnvs) { - memset(gnvs, 0, sizeof(*gnvs)); acpi_create_gnvs(gnvs); diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 586e626bba..bd424b8f71 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -661,8 +661,6 @@ static void pch_lpc_add_io_resources(struct device *dev) static void pch_lpc_read_resources(struct device *dev) { - struct global_nvs *gnvs; - /* Get the normal PCI resources of this device. */ pci_dev_read_resources(dev); @@ -671,11 +669,6 @@ static void pch_lpc_read_resources(struct device *dev) /* Add IO resources. */ pch_lpc_add_io_resources(dev); - - /* Allocate ACPI NVS in CBMEM */ - gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs)); - if (!acpi_is_wakeup_s3() && gnvs) - memset(gnvs, 0, sizeof(struct global_nvs)); } static void pch_lpc_enable(struct device *dev) @@ -687,16 +680,16 @@ static void pch_lpc_enable(struct device *dev) pch_enable(dev); } +size_t gnvs_size_of_array(void) +{ + return sizeof(struct global_nvs); +} + void southbridge_inject_dsdt(const struct device *dev) { struct global_nvs *gnvs; gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs)); - if (gnvs) - memset(gnvs, 0, sizeof(*gnvs)); - } if (gnvs) { acpi_create_gnvs(gnvs); -- cgit v1.2.3