From 88dcb3179b4b78a2376609577ae4dd4327fb59c7 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 26 Apr 2021 17:10:28 +0200 Subject: src: Retype option API to use unsigned integers The CMOS option system does not support negative integers. Thus, retype and rename the option API functions to reflect this. Change-Id: Id3480e5cfc0ec90674def7ef0919e0b7ac5b19b3 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/52672 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph Reviewed-by: Nico Huber Reviewed-by: Felix Singer --- src/southbridge/intel/bd82x6x/lpc.c | 4 ++-- src/southbridge/intel/bd82x6x/me.c | 6 +++--- src/southbridge/intel/bd82x6x/me_8.x.c | 6 +++--- src/southbridge/intel/bd82x6x/sata.c | 8 ++++---- src/southbridge/intel/common/smihandler.c | 2 +- src/southbridge/intel/i82801dx/lpc.c | 4 ++-- src/southbridge/intel/i82801gx/lpc.c | 4 ++-- src/southbridge/intel/i82801ix/lpc.c | 4 ++-- src/southbridge/intel/i82801ix/sata.c | 4 ++-- src/southbridge/intel/i82801jx/lpc.c | 4 ++-- src/southbridge/intel/i82801jx/sata.c | 4 ++-- src/southbridge/intel/ibexpeak/lpc.c | 4 ++-- src/southbridge/intel/ibexpeak/sata.c | 4 ++-- src/southbridge/intel/lynxpoint/lpc.c | 4 ++-- src/southbridge/intel/lynxpoint/smihandler.c | 2 +- 15 files changed, 32 insertions(+), 32 deletions(-) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 43d0e04a3c..c6b42ea409 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -169,7 +169,7 @@ static void pch_power_options(struct device *dev) * * If the option is not existent (Laptops), use Kconfig setting. */ - const int pwr_on = get_int_option("power_on_after_fail", + const unsigned int pwr_on = get_uint_option("power_on_after_fail", CONFIG_MAINBOARD_POWER_FAILURE_STATE); reg16 = pci_read_config16(dev, GEN_PMCON_3); @@ -211,7 +211,7 @@ static void pch_power_options(struct device *dev) outb(reg8, 0x61); reg8 = inb(0x70); - const int nmi_option = get_int_option("nmi", NMI_OFF); + const unsigned int nmi_option = get_uint_option("nmi", NMI_OFF); if (nmi_option) { printk(BIOS_INFO, "NMI sources enabled.\n"); reg8 &= ~(1 << 7); /* Set NMI. */ diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 7ffef42140..0148905fd9 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -184,8 +184,8 @@ static void intel_me_init(struct device *dev) /* Do initial setup and determine the BIOS path */ printk(BIOS_NOTICE, "ME: BIOS path: %s\n", me_get_bios_path_string(path)); - u8 me_state = get_int_option("me_state", 0); - u8 me_state_prev = get_int_option("me_state_prev", 0); + u8 me_state = get_uint_option("me_state", 0); + u8 me_state_prev = get_uint_option("me_state_prev", 0); printk(BIOS_DEBUG, "ME: me_state=%u, me_state_prev=%u\n", me_state, me_state_prev); @@ -268,7 +268,7 @@ static void intel_me_init(struct device *dev) set the 'changed' bit here. */ if (me_state != CMOS_ME_STATE(me_state_prev) || need_reset) { u8 new_state = me_state | CMOS_ME_STATE_CHANGED; - set_int_option("me_state_prev", new_state); + set_uint_option("me_state_prev", new_state); } if (need_reset) { diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 3c5fcd1796..6ad4cc22c0 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -182,8 +182,8 @@ static void intel_me_init(struct device *dev) /* Do initial setup and determine the BIOS path */ printk(BIOS_NOTICE, "ME: BIOS path: %s\n", me_get_bios_path_string(path)); - u8 me_state = get_int_option("me_state", 0); - u8 me_state_prev = get_int_option("me_state_prev", 0); + u8 me_state = get_uint_option("me_state", 0); + u8 me_state_prev = get_uint_option("me_state_prev", 0); printk(BIOS_DEBUG, "ME: me_state=%u, me_state_prev=%u\n", me_state, me_state_prev); @@ -267,7 +267,7 @@ static void intel_me_init(struct device *dev) set the 'changed' bit here. */ if (me_state != CMOS_ME_STATE(me_state_prev) || need_reset) { u8 new_state = me_state | CMOS_ME_STATE_CHANGED; - set_int_option("me_state_prev", new_state); + set_uint_option("me_state_prev", new_state); } if (need_reset) { diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c index 43ef9be3ad..c9bc14c123 100644 --- a/src/southbridge/intel/bd82x6x/sata.c +++ b/src/southbridge/intel/bd82x6x/sata.c @@ -35,7 +35,7 @@ static void sata_read_resources(struct device *dev) /* Assign fixed resources for IDE legacy mode */ - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); if (sata_mode != 2) return; @@ -71,7 +71,7 @@ static void sata_read_resources(struct device *dev) static void sata_set_resources(struct device *dev) { /* work around bug in pci_dev_set_resources(), it bails out on FIXED */ - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); if (sata_mode == 2) { unsigned int i; for (i = PCI_BASE_ADDRESS_0; i <= PCI_BASE_ADDRESS_3; i += 4) { @@ -99,7 +99,7 @@ static void sata_init(struct device *dev) } /* Default to AHCI */ - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); /* SATA configuration */ @@ -230,7 +230,7 @@ static void sata_enable(struct device *dev) if (!config) return; - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); /* * Set SATA controller mode early so the resource allocator can diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index db034fc245..798f2f1387 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -99,7 +99,7 @@ static int power_on_after_fail(void) u8 tmp70, tmp72; tmp70 = inb(0x70); tmp72 = inb(0x72); - const int s5pwr = get_int_option("power_on_after_fail", + const unsigned int s5pwr = get_uint_option("power_on_after_fail", CONFIG_MAINBOARD_POWER_FAILURE_STATE); outb(tmp70, 0x70); outb(tmp72, 0x72); diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index 098af838a3..f6c04a5d9f 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -94,7 +94,7 @@ static void i82801dx_power_options(struct device *dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - const int pwr_on = get_int_option("power_on_after_fail", MAINBOARD_POWER_ON); + const unsigned int pwr_on = get_uint_option("power_on_after_fail", MAINBOARD_POWER_ON); reg8 = pci_read_config8(dev, GEN_PMCON_3); reg8 &= 0xfe; @@ -129,7 +129,7 @@ static void i82801dx_power_options(struct device *dev) outb(reg8, 0x61); reg8 = inb(0x70); - const int nmi_option = get_int_option("nmi", NMI_OFF); + const unsigned int nmi_option = get_uint_option("nmi", NMI_OFF); if (nmi_option) { printk(BIOS_INFO, "NMI sources enabled.\n"); reg8 &= ~(1 << 7); /* Set NMI. */ diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 9c3b0e9fb7..9eabf02765 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -157,7 +157,7 @@ static void i82801gx_power_options(struct device *dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - const int pwr_on = get_int_option("power_on_after_fail", MAINBOARD_POWER_ON); + const unsigned int pwr_on = get_uint_option("power_on_after_fail", MAINBOARD_POWER_ON); reg8 = pci_read_config8(dev, GEN_PMCON_3); reg8 &= 0xfe; @@ -193,7 +193,7 @@ static void i82801gx_power_options(struct device *dev) outb(reg8, 0x61); reg8 = inb(0x70); - const int nmi_option = get_int_option("nmi", NMI_OFF); + const unsigned int nmi_option = get_uint_option("nmi", NMI_OFF); if (nmi_option) { printk(BIOS_INFO, "NMI sources enabled.\n"); reg8 &= ~(1 << 7); /* Set NMI. */ diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 32d4efc6c9..866ede9a50 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -162,7 +162,7 @@ static void i82801ix_power_options(struct device *dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - const int pwr_on = get_int_option("power_on_after_fail", MAINBOARD_POWER_ON); + const unsigned int pwr_on = get_uint_option("power_on_after_fail", MAINBOARD_POWER_ON); reg8 = pci_read_config8(dev, D31F0_GEN_PMCON_3); reg8 &= 0xfe; @@ -198,7 +198,7 @@ static void i82801ix_power_options(struct device *dev) outb(reg8, 0x61); reg8 = inb(0x74); /* Read from 0x74 as 0x70 is write only. */ - const int nmi_option = get_int_option("nmi", NMI_OFF); + const unsigned int nmi_option = get_uint_option("nmi", NMI_OFF); if (nmi_option) { printk(BIOS_INFO, "NMI sources enabled.\n"); reg8 &= ~(1 << 7); /* Set NMI. */ diff --git a/src/southbridge/intel/i82801ix/sata.c b/src/southbridge/intel/i82801ix/sata.c index d2bee88e04..df74123def 100644 --- a/src/southbridge/intel/i82801ix/sata.c +++ b/src/southbridge/intel/i82801ix/sata.c @@ -152,7 +152,7 @@ static void sata_init(struct device *const dev) } /* Default to AHCI */ - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); /* * TODO: In contrast to ICH7 and PCH code we don't set @@ -227,7 +227,7 @@ static void sata_enable(struct device *dev) if (!config) return; - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); /* * Set SATA controller mode early so the resource allocator can diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 55b4746c28..69990ab8ba 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -164,7 +164,7 @@ static void i82801jx_power_options(struct device *dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - const int pwr_on = get_int_option("power_on_after_fail", MAINBOARD_POWER_ON); + const unsigned int pwr_on = get_uint_option("power_on_after_fail", MAINBOARD_POWER_ON); reg8 = pci_read_config8(dev, D31F0_GEN_PMCON_3); reg8 &= 0xfe; @@ -200,7 +200,7 @@ static void i82801jx_power_options(struct device *dev) outb(reg8, 0x61); reg8 = inb(0x74); /* Read from 0x74 as 0x70 is write only. */ - const int nmi_option = get_int_option("nmi", NMI_OFF); + const unsigned int nmi_option = get_uint_option("nmi", NMI_OFF); if (nmi_option) { printk(BIOS_INFO, "NMI sources enabled.\n"); reg8 &= ~(1 << 7); /* Set NMI. */ diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c index 4d83388d43..c21c115ad2 100644 --- a/src/southbridge/intel/i82801jx/sata.c +++ b/src/southbridge/intel/i82801jx/sata.c @@ -139,7 +139,7 @@ static void sata_init(struct device *const dev) } /* Default to AHCI */ - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); /* * TODO: In contrast to ICH7 and PCH code we don't set @@ -205,7 +205,7 @@ static void sata_enable(struct device *dev) return; /* Default to AHCI */ - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); /* * Set SATA controller mode early so the resource allocator can diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 6fe44c6f14..6092347167 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -162,7 +162,7 @@ static void pch_power_options(struct device *dev) * * If the option is not existent (Laptops), use Kconfig setting. */ - const int pwr_on = get_int_option("power_on_after_fail", + const unsigned int pwr_on = get_uint_option("power_on_after_fail", CONFIG_MAINBOARD_POWER_FAILURE_STATE); reg16 = pci_read_config16(dev, GEN_PMCON_3); @@ -204,7 +204,7 @@ static void pch_power_options(struct device *dev) outb(reg8, 0x61); reg8 = inb(0x70); - const int nmi_option = get_int_option("nmi", NMI_OFF); + const unsigned int nmi_option = get_uint_option("nmi", NMI_OFF); if (nmi_option) { printk(BIOS_INFO, "NMI sources enabled.\n"); reg8 &= ~(1 << 7); /* Set NMI. */ diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c index dc3f1fff5d..171057ecd0 100644 --- a/src/southbridge/intel/ibexpeak/sata.c +++ b/src/southbridge/intel/ibexpeak/sata.c @@ -42,7 +42,7 @@ static void sata_init(struct device *dev) } /* Default to AHCI */ - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); /* SATA configuration */ @@ -174,7 +174,7 @@ static void sata_enable(struct device *dev) if (!config) return; - u8 sata_mode = get_int_option("sata_mode", 0); + u8 sata_mode = get_uint_option("sata_mode", 0); /* * Set SATA controller mode early so the resource allocator can diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 8d9b4510d3..fc287b0f80 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -193,7 +193,7 @@ static void pch_power_options(struct device *dev) * * If the option is not existent (Laptops), use Kconfig setting. */ - const int pwr_on = get_int_option("power_on_after_fail", + const unsigned int pwr_on = get_uint_option("power_on_after_fail", CONFIG_MAINBOARD_POWER_FAILURE_STATE); reg16 = pci_read_config16(dev, GEN_PMCON_3); @@ -235,7 +235,7 @@ static void pch_power_options(struct device *dev) outb(reg8, 0x61); reg8 = inb(0x70); - const int nmi_option = get_int_option("nmi", NMI_OFF); + const unsigned int nmi_option = get_uint_option("nmi", NMI_OFF); if (nmi_option) { printk(BIOS_INFO, "NMI sources enabled.\n"); reg8 &= ~(1 << 7); /* Set NMI. */ diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index 2c89a9538e..769cacb792 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -82,7 +82,7 @@ static int power_on_after_fail(void) u8 tmp70, tmp72; tmp70 = inb(0x70); tmp72 = inb(0x72); - const int s5pwr = get_int_option("power_on_after_fail", + const unsigned int s5pwr = get_uint_option("power_on_after_fail", CONFIG_MAINBOARD_POWER_FAILURE_STATE); outb(tmp70, 0x70); outb(tmp72, 0x72); -- cgit v1.2.3