From 9c5d4634dd39a0d3000a21c8e35a885360731529 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 26 Apr 2018 22:21:21 +0200 Subject: southbridge/intel: Remove space before/after parenthesis Change-Id: Id1bc0c88aeecc3f1d12964346326e5b087a2985e Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/25880 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/southbridge/intel/bd82x6x/lpc.c | 2 +- src/southbridge/intel/fsp_bd82x6x/lpc.c | 2 +- src/southbridge/intel/fsp_i89xx/lpc.c | 2 +- src/southbridge/intel/fsp_rangeley/lpc.c | 2 +- src/southbridge/intel/i82371eb/acpi/i82371eb.asl | 14 +++++++------- src/southbridge/intel/i82801dx/ac97.c | 2 +- src/southbridge/intel/i82801dx/lpc.c | 2 +- src/southbridge/intel/i82801ix/lpc.c | 2 +- src/southbridge/intel/i82801jx/lpc.c | 2 +- src/southbridge/intel/ibexpeak/lpc.c | 2 +- src/southbridge/intel/lynxpoint/acpi/serialio.asl | 18 +++++++++--------- src/southbridge/intel/lynxpoint/lpc.c | 2 +- 12 files changed, 26 insertions(+), 26 deletions(-) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 8d125eb6d8..ea7a80846c 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -239,7 +239,7 @@ static void pch_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70); diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c index 73366f73c1..f17a44ff17 100644 --- a/src/southbridge/intel/fsp_bd82x6x/lpc.c +++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c @@ -249,7 +249,7 @@ static void pch_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70); diff --git a/src/southbridge/intel/fsp_i89xx/lpc.c b/src/southbridge/intel/fsp_i89xx/lpc.c index 8a815c5039..3a17701f8e 100644 --- a/src/southbridge/intel/fsp_i89xx/lpc.c +++ b/src/southbridge/intel/fsp_i89xx/lpc.c @@ -249,7 +249,7 @@ static void pch_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70); diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c index cbb2297c2c..b9af406c1f 100644 --- a/src/southbridge/intel/fsp_rangeley/lpc.c +++ b/src/southbridge/intel/fsp_rangeley/lpc.c @@ -270,7 +270,7 @@ static void soc_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70); diff --git a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl index 305da2a8dd..cef36e924d 100644 --- a/src/southbridge/intel/i82371eb/acpi/i82371eb.asl +++ b/src/southbridge/intel/i82371eb/acpi/i82371eb.asl @@ -29,11 +29,11 @@ /* 8259-compatible Programmable Interrupt Controller */ Device (PIC) { - Name (_HID, EisaId ("PNP0000") ) + Name (_HID, EisaId ("PNP0000")) Name (_CRS, ResourceTemplate () { - IO (Decode16, 0x0020, 0x0020, 0x01, 0x02, ) - IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02, ) + IO (Decode16, 0x0020, 0x0020, 0x01, 0x02,) + IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02,) IRQNoFlags () {2} }) } @@ -41,10 +41,10 @@ /* PC-class DMA Controller */ Device (DMA1) { - Name (_HID, EisaId ("PNP0200") ) + Name (_HID, EisaId ("PNP0200")) Name (_CRS, ResourceTemplate () { - DMA (Compatibility, BusMaster, Transfer8, ) {4} + DMA (Compatibility, BusMaster, Transfer8,) {4} IO (Decode16, 0x0000, 0x0000, 0x01, 0x10,) IO (Decode16, 0x0080, 0x0080, 0x01, 0x11,) IO (Decode16, 0x0094, 0x0094, 0x01, 0x0C,) @@ -66,7 +66,7 @@ /* AT Real-Time Clock */ Device (RTC) { - Name (_HID, EisaId ("PNP0B00") ) + Name (_HID, EisaId ("PNP0B00")) Name (_CRS, ResourceTemplate () { IO (Decode16,0x0070,0x0070,0x01,0x04,) @@ -86,7 +86,7 @@ /* x87-compatible Floating Point Processing Unit */ Device (COPR) { - Name (_HID, EisaId ("PNP0C04") ) + Name (_HID, EisaId ("PNP0C04")) Name (_CRS, ResourceTemplate () { IO (Decode16,0x00F0,0x00F0,0x01,0x10,) diff --git a/src/southbridge/intel/i82801dx/ac97.c b/src/southbridge/intel/i82801dx/ac97.c index 3ed83b77b4..f9a7904408 100644 --- a/src/southbridge/intel/i82801dx/ac97.c +++ b/src/southbridge/intel/i82801dx/ac97.c @@ -220,7 +220,7 @@ static void ac97_modem_init(struct device *dev) mbar = pci_read_config16(dev, MBAR) & 0xfffe; reg16 = inw(mmbar + EXT_MODEM_ID1); - if ((reg16 & 0xc000) != 0xc000 ) { + if ((reg16 & 0xc000) != 0xc000) { if (reg16 & (1 << 0)) { reg32 = inw(mmbar + VENDOR_ID2); reg32 <<= 16; diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index 3502c8bebf..0f0bbcfeac 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -155,7 +155,7 @@ static void i82801dx_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Disable NMI. */ + reg8 |= (1 << 7); /* Disable NMI. */ } outb(reg8, 0x70); diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index bc45b9ddc1..abc8667a67 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -227,7 +227,7 @@ static void i82801ix_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70); diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 18025ff5dc..c631da9394 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -229,7 +229,7 @@ static void i82801jx_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70); diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 559ad0603f..857a53eb40 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -231,7 +231,7 @@ static void pch_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70); diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl index e8e81c3f03..9323b91cac 100644 --- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl +++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl @@ -131,7 +131,7 @@ Device (SDMA) Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} }) Method (_CRS, 0, NotSerialized) @@ -172,7 +172,7 @@ Device (I2C0) Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} }) // DMA channels are only used if Serial IO DMA controller is enabled @@ -254,7 +254,7 @@ Device (I2C1) Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} }) // DMA channels are only used if Serial IO DMA controller is enabled @@ -333,7 +333,7 @@ Device (SPI0) Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} }) Method (_CRS, 0, NotSerialized) @@ -371,7 +371,7 @@ Device (SPI1) Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {7} }) // DMA channels are only used if Serial IO DMA controller is enabled @@ -422,7 +422,7 @@ Device (UAR0) Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {13} }) // DMA channels are only used if Serial IO DMA controller is enabled @@ -473,7 +473,7 @@ Device (UAR1) Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {13} }) Method (_CRS, 0, NotSerialized) @@ -511,7 +511,7 @@ Device (SDIO) Name (RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {5} + Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , ,) {5} }) Method (_CRS, 0, NotSerialized) @@ -560,7 +560,7 @@ Device (GPIO) , // ResourceSource BAR0) Interrupt (ResourceConsumer, - Level, ActiveHigh, Shared, , , ) {14} + Level, ActiveHigh, Shared, , ,) {14} }) Method (_CRS, 0, NotSerialized) diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 2e3795040d..d1d00c6257 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -247,7 +247,7 @@ static void pch_power_options(device_t dev) reg8 &= ~(1 << 7); /* Set NMI. */ } else { printk(BIOS_INFO, "NMI sources disabled.\n"); - reg8 |= ( 1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ + reg8 |= (1 << 7); /* Can't mask NMI from PCI-E and NMI_NOW */ } outb(reg8, 0x70); -- cgit v1.2.3