From cf2783882f914c2a50d06a7a31130ecb0b160f05 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 16 Dec 2018 01:04:24 +0100 Subject: mb/kontron/986lcd-m: Implement disabling ethernet NIC in ramstage With the i82801gx code automatically disabling devices ethernet NICs attached to the southbridge PCIe ports can now be disabled during the ramstage. Change-Id: If4163f8101d37cc09c0b51b1be20bf8388ed2b89 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/30245 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/southbridge/intel/i82801gx/i82801gx.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'src/southbridge/intel') diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index e664eb43fa..66d47ae157 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -272,12 +272,6 @@ int southbridge_detect_s3_resume(void); * Not all features might be disabled on * all chipsets. Esp. ICH-7U is picky. */ -#define FD_PCIE6 (1 << 21) -#define FD_PCIE5 (1 << 20) -#define FD_PCIE4 (1 << 19) -#define FD_PCIE3 (1 << 18) -#define FD_PCIE2 (1 << 17) -#define FD_PCIE1 (1 << 16) #define ICH_DISABLE_PCIE(x) (1 << (16 + (x))) #define FD_EHCI (1 << 15) #define FD_LPCB (1 << 14) -- cgit v1.2.3