From 29cc9eda2021a87396ef31a6fc81daff6fd1be7a Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Thu, 2 Jul 2009 18:56:24 +0000 Subject: Move the v3 resource allocator to v2. Major changes: 1. Separate resource allocation into: A. Read Resources B. Avoid fixed resources (constrain limits) C. Allocate resources D. Set resources Usage notes: Resources which have IORESOURCE_FIXED set in the flags constrain the placement of other resources. All fixed resources will end up outside (above or below) the allocated resources. Domains usually start with base = 0 and limit = 2^address_bits - 1. I've added an IOAPIC to all platforms so that the old limit of 0xfec00000 is still there for resources. Some platforms may want to change that, but I didn't want to break anyone's board. Resources are allocated in a single block for memory and another for I/O. Currently the resource allocator doesn't support holes. Signed-off-by: Myles Watson Acked-by: Ronald G. Minnich Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/nvidia/ck804/ck804_lpc.c | 19 ++++++++++++++----- src/southbridge/nvidia/ck804/ck804_pci.c | 30 +++++++++++++----------------- 2 files changed, 27 insertions(+), 22 deletions(-) (limited to 'src/southbridge/nvidia/ck804') diff --git a/src/southbridge/nvidia/ck804/ck804_lpc.c b/src/southbridge/nvidia/ck804/ck804_lpc.c index bb2cf99401..5bdcecd78f 100644 --- a/src/southbridge/nvidia/ck804/ck804_lpc.c +++ b/src/southbridge/nvidia/ck804/ck804_lpc.c @@ -275,12 +275,21 @@ static void ck804_lpc_read_resources(device_t dev) /* Add an extra subtractive resource for both memory and I/O. */ res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); - res->flags = - IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; + res->base = 0; + res->size = 0x1000; + res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | + IORESOURCE_ASSIGNED | IORESOURCE_FIXED; res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); - res->flags = - IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; + res->base = 0xff800000; + res->size = 0x00800000; /* 8 MB for flash */ + res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | + IORESOURCE_ASSIGNED | IORESOURCE_FIXED; + + res = new_resource(dev, 3); /* IOAPIC */ + res->base = 0xfec00000; + res->size = 0x00001000; + res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } /** @@ -308,7 +317,7 @@ static void ck804_lpc_enable_childrens_resources(device_t dev) device_t child; for (child = dev->link[link].children; child; child = child->sibling) { enable_resources(child); - if (child->have_resources && (child->path.type == DEVICE_PATH_PNP)) { + if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) { for (i = 0; i < child->resources; i++) { struct resource *res; unsigned long base, end; // don't need long long diff --git a/src/southbridge/nvidia/ck804/ck804_pci.c b/src/southbridge/nvidia/ck804/ck804_pci.c index a67eab3780..70ccdc6329 100644 --- a/src/southbridge/nvidia/ck804/ck804_pci.c +++ b/src/southbridge/nvidia/ck804/ck804_pci.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -13,10 +14,8 @@ static void pci_init(struct device *dev) { uint32_t dword; -#if CONFIG_PCI_64BIT_PREF_MEM == 1 device_t pci_domain_dev; - struct resource *mem1, *mem2; -#endif + struct resource *mem, *pref; dword = pci_read_config32(dev, 0x04); dword |= (1 << 8); /* System error enable */ @@ -36,7 +35,6 @@ static void pci_init(struct device *dev) pci_write_config32(dev, 0x4c, dword); #endif -#if CONFIG_PCI_64BIT_PREF_MEM == 1 pci_domain_dev = dev->bus->dev; while (pci_domain_dev) { if (pci_domain_dev->path.type == DEVICE_PATH_PCI_DOMAIN) @@ -47,21 +45,19 @@ static void pci_init(struct device *dev) if (!pci_domain_dev) return; /* Impossible */ - mem1 = find_resource(pci_domain_dev, 1); // prefmem, it could be 64bit - mem2 = find_resource(pci_domain_dev, 2); // mem - if (mem1->base > mem2->base) { - dword = mem2->base & (0xffff0000UL); - printk_debug("PCI DOMAIN mem2 base = 0x%010Lx\n", mem2->base); + pref = probe_resource(pci_domain_dev, IOINDEX_SUBTRACTIVE(2,0)); + mem = probe_resource(pci_domain_dev, IOINDEX_SUBTRACTIVE(1,0)); + + if (!mem) + return; /* Impossible */ + + if (!pref || pref->base > mem->base) { + dword = mem->base & (0xffff0000UL); + printk_debug("PCI DOMAIN mem base = 0x%010Lx\n", mem->base); } else { - dword = mem1->base & (0xffff0000UL); - printk_debug("PCI DOMAIN mem1 (prefmem) base = 0x%010Lx\n", - mem1->base); + dword = pref->base & (0xffff0000UL); + printk_debug("PCI DOMAIN pref base = 0x%010Lx\n", pref->base); } -#else - dword = dev_root.resource[1].base & (0xffff0000UL); - printk_debug("dev_root mem base = 0x%010Lx\n", - dev_root.resource[1].base); -#endif printk_debug("[0x50] <-- 0x%08x\n", dword); pci_write_config32(dev, 0x50, dword); /* TOM */ -- cgit v1.2.3