From 065857ee7fd61b05025d7a803e82f2b9b53cbc9a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sat, 2 Mar 2019 18:00:29 +0200
Subject: arch/io.h: Drop unnecessary include
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Change-Id: I91158452680586ac676ea11c8589062880a31f91
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31692
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/southbridge/amd/agesa/hudson/bootblock.c   | 1 -
 src/southbridge/amd/agesa/hudson/hda.c         | 1 -
 src/southbridge/amd/agesa/hudson/lpc.c         | 1 -
 src/southbridge/amd/agesa/hudson/reset.c       | 1 -
 src/southbridge/amd/agesa/hudson/sata.c        | 1 -
 src/southbridge/amd/agesa/hudson/sd.c          | 1 -
 src/southbridge/amd/agesa/hudson/sm.c          | 1 -
 src/southbridge/amd/agesa/hudson/usb.c         | 1 -
 src/southbridge/amd/amd8111/bootblock.c        | 1 -
 src/southbridge/amd/amd8111/reset.c            | 1 -
 src/southbridge/amd/amd8111/smbus.c            | 1 -
 src/southbridge/amd/amd8111/usb.c              | 1 -
 src/southbridge/amd/cimx/sb800/cfg.c           | 1 -
 src/southbridge/amd/cimx/sb800/early.c         | 1 -
 src/southbridge/amd/cimx/sb800/lpc.c           | 1 -
 src/southbridge/amd/cimx/sb800/reset.c         | 1 -
 src/southbridge/amd/cimx/sb900/bootblock.c     | 1 -
 src/southbridge/amd/cimx/sb900/reset.c         | 1 -
 src/southbridge/amd/pi/hudson/bootblock.c      | 1 -
 src/southbridge/amd/pi/hudson/hda.c            | 1 -
 src/southbridge/amd/pi/hudson/lpc.c            | 1 -
 src/southbridge/amd/pi/hudson/reset.c          | 1 -
 src/southbridge/amd/pi/hudson/sata.c           | 1 -
 src/southbridge/amd/pi/hudson/sd.c             | 1 -
 src/southbridge/amd/pi/hudson/sm.c             | 1 -
 src/southbridge/amd/pi/hudson/usb.c            | 1 -
 src/southbridge/amd/rs780/cmn.c                | 1 -
 src/southbridge/amd/rs780/early_setup.c        | 1 -
 src/southbridge/amd/rs780/rs780.c              | 1 -
 src/southbridge/amd/sb700/bootblock.c          | 1 -
 src/southbridge/amd/sb700/fadt.c               | 1 -
 src/southbridge/amd/sb700/lpc.c                | 1 -
 src/southbridge/amd/sb700/smbus.h              | 1 -
 src/southbridge/amd/sb800/bootblock.c          | 1 -
 src/southbridge/amd/sb800/fadt.c               | 1 -
 src/southbridge/amd/sb800/lpc.c                | 1 -
 src/southbridge/amd/sr5650/cmn.h               | 1 -
 src/southbridge/broadcom/bcm5785/bootblock.c   | 1 -
 src/southbridge/broadcom/bcm5785/lpc.c         | 1 -
 src/southbridge/intel/bd82x6x/bootblock.c      | 1 -
 src/southbridge/intel/bd82x6x/early_spi.c      | 1 -
 src/southbridge/intel/bd82x6x/early_usb_mrc.c  | 1 -
 src/southbridge/intel/bd82x6x/pch.c            | 1 -
 src/southbridge/intel/bd82x6x/usb_xhci.c       | 1 -
 src/southbridge/intel/bd82x6x/watchdog.c       | 1 -
 src/southbridge/intel/common/acpi_pirq_gen.c   | 1 -
 src/southbridge/intel/common/pmutil.c          | 1 -
 src/southbridge/intel/common/usb_debug.c       | 1 -
 src/southbridge/intel/fsp_rangeley/early_spi.c | 1 -
 src/southbridge/intel/fsp_rangeley/early_usb.c | 1 -
 src/southbridge/intel/fsp_rangeley/smbus.c     | 1 -
 src/southbridge/intel/i82371eb/bootblock.c     | 1 -
 src/southbridge/intel/i82371eb/early_pm.c      | 1 -
 src/southbridge/intel/i82371eb/i82371eb.h      | 1 -
 src/southbridge/intel/i82801dx/bootblock.c     | 1 -
 src/southbridge/intel/i82801gx/bootblock.c     | 1 -
 src/southbridge/intel/i82801gx/smbus.c         | 1 -
 src/southbridge/intel/i82801gx/smihandler.c    | 1 -
 src/southbridge/intel/i82801ix/bootblock.c     | 1 -
 src/southbridge/intel/i82801ix/dmi_setup.c     | 1 -
 src/southbridge/intel/i82801ix/smbus.c         | 1 -
 src/southbridge/intel/i82801ix/smihandler.c    | 1 -
 src/southbridge/intel/i82801jx/bootblock.c     | 1 -
 src/southbridge/intel/i82801jx/smbus.c         | 1 -
 src/southbridge/intel/i82801jx/smihandler.c    | 1 -
 src/southbridge/intel/i82870/pci_parity.c      | 1 -
 src/southbridge/intel/ibexpeak/madt.c          | 1 -
 src/southbridge/intel/lynxpoint/bootblock.c    | 1 -
 src/southbridge/intel/lynxpoint/early_spi.c    | 1 -
 src/southbridge/intel/lynxpoint/early_usb.c    | 1 -
 src/southbridge/intel/lynxpoint/pch.c          | 1 -
 src/southbridge/intel/lynxpoint/rcba.c         | 1 -
 src/southbridge/nvidia/ck804/bootblock.c       | 1 -
 src/southbridge/nvidia/ck804/ck804.c           | 1 -
 src/southbridge/nvidia/ck804/enable_usbdebug.c | 1 -
 src/southbridge/nvidia/ck804/smbus.c           | 1 -
 src/southbridge/nvidia/mcp55/bootblock.c       | 1 -
 src/southbridge/nvidia/mcp55/enable_usbdebug.c | 1 -
 src/southbridge/nvidia/mcp55/fadt.c            | 1 -
 src/southbridge/nvidia/mcp55/mcp55.c           | 1 -
 src/southbridge/nvidia/mcp55/smbus.c           | 1 -
 src/southbridge/ricoh/rl5c476/rl5c476.c        | 1 -
 src/southbridge/ti/pci1x2x/pci1x2x.c           | 1 -
 src/southbridge/ti/pci7420/cardbus.c           | 1 -
 src/southbridge/ti/pci7420/firewire.c          | 1 -
 src/southbridge/ti/pcixx12/pcixx12.c           | 1 -
 86 files changed, 86 deletions(-)

(limited to 'src/southbridge')

diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c
index a10068701c..f12cec8602 100644
--- a/src/southbridge/amd/agesa/hudson/bootblock.c
+++ b/src/southbridge/amd/agesa/hudson/bootblock.c
@@ -14,7 +14,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 /*
diff --git a/src/southbridge/amd/agesa/hudson/hda.c b/src/southbridge/amd/agesa/hudson/hda.c
index 2f590c76bd..1cd8953c17 100644
--- a/src/southbridge/amd/agesa/hudson/hda.c
+++ b/src/southbridge/amd/agesa/hudson/hda.c
@@ -17,7 +17,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include <delay.h>
 #include "hudson.h"
 
diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index 8d07e6487e..bf231f8a47 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -23,7 +23,6 @@
 #include <device/pci_def.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
-#include <arch/io.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <pc80/i8254.h>
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c
index 64f947eb67..e3290384dc 100644
--- a/src/southbridge/amd/agesa/hudson/reset.c
+++ b/src/southbridge/amd/agesa/hudson/reset.c
@@ -16,7 +16,6 @@
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <cf9_reset.h>
 #include <reset.h>
diff --git a/src/southbridge/amd/agesa/hudson/sata.c b/src/southbridge/amd/agesa/hudson/sata.c
index 7762455c9a..b08e298f06 100644
--- a/src/southbridge/amd/agesa/hudson/sata.c
+++ b/src/southbridge/amd/agesa/hudson/sata.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 
diff --git a/src/southbridge/amd/agesa/hudson/sd.c b/src/southbridge/amd/agesa/hudson/sd.c
index 878f136205..ec447ef20e 100644
--- a/src/southbridge/amd/agesa/hudson/sd.c
+++ b/src/southbridge/amd/agesa/hudson/sd.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 static void sd_init(struct device *dev)
diff --git a/src/southbridge/amd/agesa/hudson/sm.c b/src/southbridge/amd/agesa/hudson/sm.c
index 2cd1ff20dc..46eca33555 100644
--- a/src/southbridge/amd/agesa/hudson/sm.c
+++ b/src/southbridge/amd/agesa/hudson/sm.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/smbus.h>
-#include <arch/io.h>
 #include <cpu/x86/lapic.h>
 #include <arch/ioapic.h>
 #include <stdlib.h>
diff --git a/src/southbridge/amd/agesa/hudson/usb.c b/src/southbridge/amd/agesa/hudson/usb.c
index b17537b2cd..ec305afe27 100644
--- a/src/southbridge/amd/agesa/hudson/usb.c
+++ b/src/southbridge/amd/agesa/hudson/usb.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/pci_ehci.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 static struct pci_operations lops_pci = {
diff --git a/src/southbridge/amd/amd8111/bootblock.c b/src/southbridge/amd/amd8111/bootblock.c
index 90ba000172..40622bae75 100644
--- a/src/southbridge/amd/amd8111/bootblock.c
+++ b/src/southbridge/amd/amd8111/bootblock.c
@@ -15,7 +15,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <device/pci_type.h>
diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c
index e1ac8a98ed..f4907c53da 100644
--- a/src/southbridge/amd/amd8111/reset.c
+++ b/src/southbridge/amd/amd8111/reset.c
@@ -14,7 +14,6 @@
 
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <reset.h>
 #include <device/pci.h>
diff --git a/src/southbridge/amd/amd8111/smbus.c b/src/southbridge/amd/amd8111/smbus.c
index 17782e2b62..aa580fecbb 100644
--- a/src/southbridge/amd/amd8111/smbus.c
+++ b/src/southbridge/amd/amd8111/smbus.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/smbus.h>
-#include <arch/io.h>
 #include "amd8111.h"
 
 
diff --git a/src/southbridge/amd/amd8111/usb.c b/src/southbridge/amd/amd8111/usb.c
index 5c29d7cc8b..741cad9d37 100644
--- a/src/southbridge/amd/amd8111/usb.c
+++ b/src/southbridge/amd/amd8111/usb.c
@@ -17,7 +17,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "amd8111.h"
 
 
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c
index 10272166d0..4487df3787 100644
--- a/src/southbridge/amd/cimx/sb800/cfg.c
+++ b/src/southbridge/amd/cimx/sb800/cfg.c
@@ -17,7 +17,6 @@
 #include "cfg.h"
 #include <OEM.h>
 
-#include <arch/io.h>
 #include <arch/acpi.h>
 
 /**
diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c
index adc69d8a16..5b19b5a1c8 100644
--- a/src/southbridge/amd/cimx/sb800/early.c
+++ b/src/southbridge/amd/cimx/sb800/early.c
@@ -15,7 +15,6 @@
 
 #include <stdint.h>
 #include <device/pci_ids.h>
-#include <arch/io.h>		/* inl, outl */
 #include "SBPLATFORM.h"
 #include "sb_cimx.h"
 #include "cfg.h"		/*sb800_cimx_config*/
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index 8573f6fafe..a88d6d34e9 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -19,7 +19,6 @@
 #include <device/pci_def.h>
 #include <arch/ioapic.h>
 #include "lpc.h"
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 void lpc_read_resources(struct device *dev)
diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c
index 4b96d3c8c0..787f7426ce 100644
--- a/src/southbridge/amd/cimx/sb800/reset.c
+++ b/src/southbridge/amd/cimx/sb800/reset.c
@@ -16,7 +16,6 @@
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <cf9_reset.h>
 #include <reset.h>
diff --git a/src/southbridge/amd/cimx/sb900/bootblock.c b/src/southbridge/amd/cimx/sb900/bootblock.c
index 734cc7a831..11faeab3d7 100644
--- a/src/southbridge/amd/cimx/sb900/bootblock.c
+++ b/src/southbridge/amd/cimx/sb900/bootblock.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 static void sb900_enable_rom(void)
diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c
index 4b96d3c8c0..787f7426ce 100644
--- a/src/southbridge/amd/cimx/sb900/reset.c
+++ b/src/southbridge/amd/cimx/sb900/reset.c
@@ -16,7 +16,6 @@
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <cf9_reset.h>
 #include <reset.h>
diff --git a/src/southbridge/amd/pi/hudson/bootblock.c b/src/southbridge/amd/pi/hudson/bootblock.c
index 0f5bdb142b..bdda5edbcc 100644
--- a/src/southbridge/amd/pi/hudson/bootblock.c
+++ b/src/southbridge/amd/pi/hudson/bootblock.c
@@ -14,7 +14,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 
diff --git a/src/southbridge/amd/pi/hudson/hda.c b/src/southbridge/amd/pi/hudson/hda.c
index 879e636418..d5c92b4608 100644
--- a/src/southbridge/amd/pi/hudson/hda.c
+++ b/src/southbridge/amd/pi/hudson/hda.c
@@ -17,7 +17,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include <delay.h>
 #include "hudson.h"
 
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index 9b8753a3fe..1d504ae598 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -23,7 +23,6 @@
 #include <device/pci_def.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
-#include <arch/io.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <pc80/i8254.h>
diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c
index 64f947eb67..e3290384dc 100644
--- a/src/southbridge/amd/pi/hudson/reset.c
+++ b/src/southbridge/amd/pi/hudson/reset.c
@@ -16,7 +16,6 @@
 // Use simple device model for this file even in ramstage
 #define __SIMPLE_DEVICE__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <cf9_reset.h>
 #include <reset.h>
diff --git a/src/southbridge/amd/pi/hudson/sata.c b/src/southbridge/amd/pi/hudson/sata.c
index d4279b2bbb..4268bc2f34 100644
--- a/src/southbridge/amd/pi/hudson/sata.c
+++ b/src/southbridge/amd/pi/hudson/sata.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 
diff --git a/src/southbridge/amd/pi/hudson/sd.c b/src/southbridge/amd/pi/hudson/sd.c
index 8bb7538b29..c4193786aa 100644
--- a/src/southbridge/amd/pi/hudson/sd.c
+++ b/src/southbridge/amd/pi/hudson/sd.c
@@ -18,7 +18,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 static void sd_init(struct device *dev)
diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c
index 6d1c2bcbdb..03875679b3 100644
--- a/src/southbridge/amd/pi/hudson/sm.c
+++ b/src/southbridge/amd/pi/hudson/sm.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/smbus.h>
-#include <arch/io.h>
 #include <cpu/x86/lapic.h>
 #include <arch/ioapic.h>
 #include <stdlib.h>
diff --git a/src/southbridge/amd/pi/hudson/usb.c b/src/southbridge/amd/pi/hudson/usb.c
index 9bdc22de18..f6d01062b0 100644
--- a/src/southbridge/amd/pi/hudson/usb.c
+++ b/src/southbridge/amd/pi/hudson/usb.c
@@ -18,7 +18,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/pci_ehci.h>
-#include <arch/io.h>
 #include "hudson.h"
 
 static struct pci_operations lops_pci = {
diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c
index 2ef9cd6bf2..3c79a81244 100644
--- a/src/southbridge/amd/rs780/cmn.c
+++ b/src/southbridge/amd/rs780/cmn.c
@@ -14,7 +14,6 @@
  */
 
 #include <console/console.h>
-#include <arch/io.h>
 #include <arch/cpu.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c
index 0332f2f872..cccec44e56 100644
--- a/src/southbridge/amd/rs780/early_setup.c
+++ b/src/southbridge/amd/rs780/early_setup.c
@@ -14,7 +14,6 @@
  */
 
 #include <types.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <northbridge/amd/amdmct/mct/mct_d.h>
 #include <console/console.h>
diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c
index 28e337f5d0..d2a0b16741 100644
--- a/src/southbridge/amd/rs780/rs780.c
+++ b/src/southbridge/amd/rs780/rs780.c
@@ -14,7 +14,6 @@
  */
 
 #include <console/console.h>
-#include <arch/io.h>
 #include <arch/acpi.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/southbridge/amd/sb700/bootblock.c b/src/southbridge/amd/sb700/bootblock.c
index ed6f2561f5..012a22cd58 100644
--- a/src/southbridge/amd/sb700/bootblock.c
+++ b/src/southbridge/amd/sb700/bootblock.c
@@ -15,7 +15,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 #define IO_MEM_PORT_DECODE_ENABLE_5	0x48
diff --git a/src/southbridge/amd/sb700/fadt.c b/src/southbridge/amd/sb700/fadt.c
index 723f0dc361..94fc5dc4a1 100644
--- a/src/southbridge/amd/sb700/fadt.c
+++ b/src/southbridge/amd/sb700/fadt.c
@@ -21,7 +21,6 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
-#include <arch/io.h>
 #include <device/device.h>
 #include <cpu/amd/powernow.h>
 #include <version.h>
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index eb0af0de1c..2ebd7a59ce 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -26,7 +26,6 @@
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <pc80/isa-dma.h>
-#include <arch/io.h>
 #include <arch/ioapic.h>
 #include <cpu/amd/powernow.h>
 #include "sb700.h"
diff --git a/src/southbridge/amd/sb700/smbus.h b/src/southbridge/amd/sb700/smbus.h
index 1b90091beb..179fbf0282 100644
--- a/src/southbridge/amd/sb700/smbus.h
+++ b/src/southbridge/amd/sb700/smbus.h
@@ -19,7 +19,6 @@
 
 #include <stdint.h>
 #include "stddef.h"
-#include <arch/io.h>
 
 #define SMBUS_IO_BASE 0xb00
 #define SMBUS_AUX_IO_BASE 0xb20
diff --git a/src/southbridge/amd/sb800/bootblock.c b/src/southbridge/amd/sb800/bootblock.c
index 9062118a90..0b3486406e 100644
--- a/src/southbridge/amd/sb800/bootblock.c
+++ b/src/southbridge/amd/sb800/bootblock.c
@@ -14,7 +14,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 /*
diff --git a/src/southbridge/amd/sb800/fadt.c b/src/southbridge/amd/sb800/fadt.c
index bb0a070581..eb0ea1c6e0 100644
--- a/src/southbridge/amd/sb800/fadt.c
+++ b/src/southbridge/amd/sb800/fadt.c
@@ -21,7 +21,6 @@
 #include <string.h>
 #include <console/console.h>
 #include <arch/acpi.h>
-#include <arch/io.h>
 #include <device/device.h>
 #include <cpu/amd/powernow.h>
 #include <version.h>
diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c
index e67dcd7464..4746f153f2 100644
--- a/src/southbridge/amd/sb800/lpc.c
+++ b/src/southbridge/amd/sb800/lpc.c
@@ -24,7 +24,6 @@
 #include <pc80/i8254.h>
 #include <pc80/i8259.h>
 #include <pc80/isa-dma.h>
-#include <arch/io.h>
 #include <arch/acpi.h>
 #include "sb800.h"
 
diff --git a/src/southbridge/amd/sr5650/cmn.h b/src/southbridge/amd/sr5650/cmn.h
index 30aeed25d6..d70e7a9c9b 100644
--- a/src/southbridge/amd/sr5650/cmn.h
+++ b/src/southbridge/amd/sr5650/cmn.h
@@ -17,7 +17,6 @@
 #ifndef __SR5650_CMN_H__
 #define __SR5650_CMN_H__
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 #define NBMISC_INDEX	0x60
diff --git a/src/southbridge/broadcom/bcm5785/bootblock.c b/src/southbridge/broadcom/bcm5785/bootblock.c
index 3f7443694d..c14f47aa53 100644
--- a/src/southbridge/broadcom/bcm5785/bootblock.c
+++ b/src/southbridge/broadcom/bcm5785/bootblock.c
@@ -15,7 +15,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <device/pci_type.h>
diff --git a/src/southbridge/broadcom/bcm5785/lpc.c b/src/southbridge/broadcom/bcm5785/lpc.c
index 8619cbd32a..a091e9ff54 100644
--- a/src/southbridge/broadcom/bcm5785/lpc.c
+++ b/src/southbridge/broadcom/bcm5785/lpc.c
@@ -22,7 +22,6 @@
 #include <device/pci_ops.h>
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
-#include <arch/io.h>
 #include <arch/ioapic.h>
 #include "bcm5785.h"
 
diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c
index b0b8afa9eb..0086fe3281 100644
--- a/src/southbridge/intel/bd82x6x/bootblock.c
+++ b/src/southbridge/intel/bd82x6x/bootblock.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include "pch.h"
 
diff --git a/src/southbridge/intel/bd82x6x/early_spi.c b/src/southbridge/intel/bd82x6x/early_spi.c
index e3f07ad203..3034930a06 100644
--- a/src/southbridge/intel/bd82x6x/early_spi.c
+++ b/src/southbridge/intel/bd82x6x/early_spi.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <delay.h>
diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c
index a19794e819..f5df5a3bb2 100644
--- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c
+++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include "pch.h"
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 88ee0cbb38..746c11a2e3 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -18,7 +18,6 @@
 #include <console/console.h>
 #include <delay.h>
 #ifdef __SMM__
-#include <arch/io.h>
 #include <device/pci_def.h>
 #else /* !__SMM__ */
 #include <device/device.h>
diff --git a/src/southbridge/intel/bd82x6x/usb_xhci.c b/src/southbridge/intel/bd82x6x/usb_xhci.c
index d7b25c94b5..07d74e0248 100644
--- a/src/southbridge/intel/bd82x6x/usb_xhci.c
+++ b/src/southbridge/intel/bd82x6x/usb_xhci.c
@@ -20,7 +20,6 @@
 #include <device/pci_ids.h>
 #include "pch.h"
 #include <device/pci_ehci.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 static void usb_xhci_init(struct device *dev)
diff --git a/src/southbridge/intel/bd82x6x/watchdog.c b/src/southbridge/intel/bd82x6x/watchdog.c
index 4e40dd49f5..6373a39e47 100644
--- a/src/southbridge/intel/bd82x6x/watchdog.c
+++ b/src/southbridge/intel/bd82x6x/watchdog.c
@@ -16,7 +16,6 @@
  */
 
 #include <console/console.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c
index 6f28bc693f..ade1a98b62 100644
--- a/src/southbridge/intel/common/acpi_pirq_gen.c
+++ b/src/southbridge/intel/common/acpi_pirq_gen.c
@@ -14,7 +14,6 @@
  */
 
 #include <arch/acpigen.h>
-#include <arch/io.h>
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c
index abe7cc361e..16ae3c6557 100644
--- a/src/southbridge/intel/common/pmutil.c
+++ b/src/southbridge/intel/common/pmutil.c
@@ -15,7 +15,6 @@
  */
 
 #include <types.h>
-#include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <device/pci_def.h>
diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c
index 83e407860d..4c5fe96b0d 100644
--- a/src/southbridge/intel/common/usb_debug.c
+++ b/src/southbridge/intel/common/usb_debug.c
@@ -17,7 +17,6 @@
 #define __SIMPLE_DEVICE__
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_ehci.h>
 #include <device/pci_def.h>
diff --git a/src/southbridge/intel/fsp_rangeley/early_spi.c b/src/southbridge/intel/fsp_rangeley/early_spi.c
index 3c4f2d7ee5..7b20cdb9a7 100644
--- a/src/southbridge/intel/fsp_rangeley/early_spi.c
+++ b/src/southbridge/intel/fsp_rangeley/early_spi.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <delay.h>
diff --git a/src/southbridge/intel/fsp_rangeley/early_usb.c b/src/southbridge/intel/fsp_rangeley/early_usb.c
index 896ef64bad..0b10ef6e05 100644
--- a/src/southbridge/intel/fsp_rangeley/early_usb.c
+++ b/src/southbridge/intel/fsp_rangeley/early_usb.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include "soc.h"
diff --git a/src/southbridge/intel/fsp_rangeley/smbus.c b/src/southbridge/intel/fsp_rangeley/smbus.c
index 907f39270d..90b0420465 100644
--- a/src/southbridge/intel/fsp_rangeley/smbus.c
+++ b/src/southbridge/intel/fsp_rangeley/smbus.c
@@ -20,7 +20,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include <southbridge/intel/common/smbus.h>
 #include "soc.h"
 
diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c
index ea167b59f7..2b8cd1f4b7 100644
--- a/src/southbridge/intel/i82371eb/bootblock.c
+++ b/src/southbridge/intel/i82371eb/bootblock.c
@@ -15,7 +15,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <device/pci_type.h>
diff --git a/src/southbridge/intel/i82371eb/early_pm.c b/src/southbridge/intel/i82371eb/early_pm.c
index 2233be0fec..465710d03d 100644
--- a/src/southbridge/intel/i82371eb/early_pm.c
+++ b/src/southbridge/intel/i82371eb/early_pm.c
@@ -15,7 +15,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci.h>
 #include <device/pci_def.h>
diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h
index 1fea0ff46f..5e0ff3f418 100644
--- a/src/southbridge/intel/i82371eb/i82371eb.h
+++ b/src/southbridge/intel/i82371eb/i82371eb.h
@@ -19,7 +19,6 @@
 
 #if !defined(__ASSEMBLER__) && !defined(__ACPI__)
 #if !defined(__PRE_RAM__)
-#include <arch/io.h>
 #include <device/device.h>
 #include "chip.h"
 
diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c
index 1601b55cd6..ef348553cc 100644
--- a/src/southbridge/intel/i82801dx/bootblock.c
+++ b/src/southbridge/intel/i82801dx/bootblock.c
@@ -12,7 +12,6 @@
  */
 
 #include <cpu/intel/car/bootblock.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 void bootblock_early_southbridge_init(void)
diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c
index 991f1bda6e..426973fc2f 100644
--- a/src/southbridge/intel/i82801gx/bootblock.c
+++ b/src/southbridge/intel/i82801gx/bootblock.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include "i82801gx.h"
 
diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c
index 917321c159..7e95beb9bd 100644
--- a/src/southbridge/intel/i82801gx/smbus.c
+++ b/src/southbridge/intel/i82801gx/smbus.c
@@ -20,7 +20,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include <southbridge/intel/common/smbus.h>
 #include "i82801gx.h"
 
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index 1b4a063d0e..cf7f277660 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -15,7 +15,6 @@
  */
 
 #include <types.h>
-#include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/i82801ix/bootblock.c b/src/southbridge/intel/i82801ix/bootblock.c
index 8174623847..1957512cc0 100644
--- a/src/southbridge/intel/i82801ix/bootblock.c
+++ b/src/southbridge/intel/i82801ix/bootblock.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 
 static void enable_spi_prefetch(void)
diff --git a/src/southbridge/intel/i82801ix/dmi_setup.c b/src/southbridge/intel/i82801ix/dmi_setup.c
index 24fe347423..663c6d363d 100644
--- a/src/southbridge/intel/i82801ix/dmi_setup.c
+++ b/src/southbridge/intel/i82801ix/dmi_setup.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_def.h>
 #include <console/console.h>
 #include <northbridge/intel/gm45/gm45.h>
diff --git a/src/southbridge/intel/i82801ix/smbus.c b/src/southbridge/intel/i82801ix/smbus.c
index 303aae64f2..c3d23eaccf 100644
--- a/src/southbridge/intel/i82801ix/smbus.c
+++ b/src/southbridge/intel/i82801ix/smbus.c
@@ -20,7 +20,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include <southbridge/intel/common/smbus.h>
 #include "i82801ix.h"
 
diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c
index af418b2994..8090a09040 100644
--- a/src/southbridge/intel/i82801ix/smihandler.c
+++ b/src/southbridge/intel/i82801ix/smihandler.c
@@ -16,7 +16,6 @@
  */
 
 #include <types.h>
-#include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/i82801jx/bootblock.c b/src/southbridge/intel/i82801jx/bootblock.c
index 011c15c2e5..fb2d5337b3 100644
--- a/src/southbridge/intel/i82801jx/bootblock.c
+++ b/src/southbridge/intel/i82801jx/bootblock.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include "i82801jx.h"
 
diff --git a/src/southbridge/intel/i82801jx/smbus.c b/src/southbridge/intel/i82801jx/smbus.c
index 1c479f7c15..f9e223f591 100644
--- a/src/southbridge/intel/i82801jx/smbus.c
+++ b/src/southbridge/intel/i82801jx/smbus.c
@@ -20,7 +20,6 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
 #include <southbridge/intel/common/smbus.h>
 #include "i82801jx.h"
 
diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c
index 67b45a1e92..667a8531da 100644
--- a/src/southbridge/intel/i82801jx/smihandler.c
+++ b/src/southbridge/intel/i82801jx/smihandler.c
@@ -16,7 +16,6 @@
  */
 
 #include <types.h>
-#include <arch/io.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/i82870/pci_parity.c b/src/southbridge/intel/i82870/pci_parity.c
index 94b2f31cb9..3bb05ccf03 100644
--- a/src/southbridge/intel/i82870/pci_parity.c
+++ b/src/southbridge/intel/i82870/pci_parity.c
@@ -12,7 +12,6 @@
  */
 
 #include <pci.h>
-#include <arch/io.h>
 #include <printk.h>
 #
 
diff --git a/src/southbridge/intel/ibexpeak/madt.c b/src/southbridge/intel/ibexpeak/madt.c
index 585df93715..0affa790dd 100644
--- a/src/southbridge/intel/ibexpeak/madt.c
+++ b/src/southbridge/intel/ibexpeak/madt.c
@@ -16,7 +16,6 @@
  */
 
 #include <string.h>
-#include <arch/io.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c
index 82fe07ebdc..16f4ef90bc 100644
--- a/src/southbridge/intel/lynxpoint/bootblock.c
+++ b/src/southbridge/intel/lynxpoint/bootblock.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include "pch.h"
 
diff --git a/src/southbridge/intel/lynxpoint/early_spi.c b/src/southbridge/intel/lynxpoint/early_spi.c
index e3f07ad203..3034930a06 100644
--- a/src/southbridge/intel/lynxpoint/early_spi.c
+++ b/src/southbridge/intel/lynxpoint/early_spi.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <delay.h>
diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c
index c0186dbc79..cd3609426f 100644
--- a/src/southbridge/intel/lynxpoint/early_usb.c
+++ b/src/southbridge/intel/lynxpoint/early_usb.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include "pch.h"
diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c
index 74943c6cb7..5cf67aa238 100644
--- a/src/southbridge/intel/lynxpoint/pch.c
+++ b/src/southbridge/intel/lynxpoint/pch.c
@@ -17,7 +17,6 @@
 
 #include <console/console.h>
 #include <delay.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/southbridge/intel/lynxpoint/rcba.c b/src/southbridge/intel/lynxpoint/rcba.c
index 6faa982ac2..57253cb7f3 100644
--- a/src/southbridge/intel/lynxpoint/rcba.c
+++ b/src/southbridge/intel/lynxpoint/rcba.c
@@ -14,7 +14,6 @@
  */
 
 #include <device/pci_def.h>
-#include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include "pch.h"
diff --git a/src/southbridge/nvidia/ck804/bootblock.c b/src/southbridge/nvidia/ck804/bootblock.c
index 4275472d87..3b36a69733 100644
--- a/src/southbridge/nvidia/ck804/bootblock.c
+++ b/src/southbridge/nvidia/ck804/bootblock.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include "ck804.h"
 
diff --git a/src/southbridge/nvidia/ck804/ck804.c b/src/southbridge/nvidia/ck804/ck804.c
index 615872de5c..59796e1add 100644
--- a/src/southbridge/nvidia/ck804/ck804.c
+++ b/src/southbridge/nvidia/ck804/ck804.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
diff --git a/src/southbridge/nvidia/ck804/enable_usbdebug.c b/src/southbridge/nvidia/ck804/enable_usbdebug.c
index c866138d4b..e8315092d6 100644
--- a/src/southbridge/nvidia/ck804/enable_usbdebug.c
+++ b/src/southbridge/nvidia/ck804/enable_usbdebug.c
@@ -21,7 +21,6 @@
 #define __SIMPLE_DEVICE__
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_ehci.h>
 #include <device/pci_def.h>
diff --git a/src/southbridge/nvidia/ck804/smbus.c b/src/southbridge/nvidia/ck804/smbus.c
index a1e50884c3..2d223fdf83 100644
--- a/src/southbridge/nvidia/ck804/smbus.c
+++ b/src/southbridge/nvidia/ck804/smbus.c
@@ -19,7 +19,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/smbus.h>
-#include <arch/io.h>
 #include "chip.h"
 #include "smbus.h"
 
diff --git a/src/southbridge/nvidia/mcp55/bootblock.c b/src/southbridge/nvidia/mcp55/bootblock.c
index 9a04a87144..a3593d3001 100644
--- a/src/southbridge/nvidia/mcp55/bootblock.c
+++ b/src/southbridge/nvidia/mcp55/bootblock.c
@@ -18,7 +18,6 @@
  */
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include "mcp55.h"
 
diff --git a/src/southbridge/nvidia/mcp55/enable_usbdebug.c b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
index b4b428635d..badf8f47e2 100644
--- a/src/southbridge/nvidia/mcp55/enable_usbdebug.c
+++ b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
@@ -21,7 +21,6 @@
 #define __SIMPLE_DEVICE__
 
 #include <stdint.h>
-#include <arch/io.h>
 #include <device/pci_ops.h>
 #include <device/pci_ehci.h>
 #include <device/pci_def.h>
diff --git a/src/southbridge/nvidia/mcp55/fadt.c b/src/southbridge/nvidia/mcp55/fadt.c
index 4d2d396957..6aaa7026a5 100644
--- a/src/southbridge/nvidia/mcp55/fadt.c
+++ b/src/southbridge/nvidia/mcp55/fadt.c
@@ -19,7 +19,6 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
-#include <arch/io.h>
 #include <device/device.h>
 #include <device/pci_ids.h>
 #include <version.h>
diff --git a/src/southbridge/nvidia/mcp55/mcp55.c b/src/southbridge/nvidia/mcp55/mcp55.c
index 8f0ec8fe77..f93ec92a70 100644
--- a/src/southbridge/nvidia/mcp55/mcp55.c
+++ b/src/southbridge/nvidia/mcp55/mcp55.c
@@ -17,7 +17,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
diff --git a/src/southbridge/nvidia/mcp55/smbus.c b/src/southbridge/nvidia/mcp55/smbus.c
index 51a71805f3..38604389e4 100644
--- a/src/southbridge/nvidia/mcp55/smbus.c
+++ b/src/southbridge/nvidia/mcp55/smbus.c
@@ -22,7 +22,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/smbus.h>
-#include <arch/io.h>
 #include "mcp55.h"
 #include "smbus.h"
 
diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.c b/src/southbridge/ricoh/rl5c476/rl5c476.c
index 786a510c8b..4d8b6e6322 100644
--- a/src/southbridge/ricoh/rl5c476/rl5c476.c
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
diff --git a/src/southbridge/ti/pci1x2x/pci1x2x.c b/src/southbridge/ti/pci1x2x/pci1x2x.c
index e670a43b06..f84d86680f 100644
--- a/src/southbridge/ti/pci1x2x/pci1x2x.c
+++ b/src/southbridge/ti/pci1x2x/pci1x2x.c
@@ -20,7 +20,6 @@
 #include <device/pci_ops.h>
 #include <device/cardbus.h>
 #include <console/console.h>
-#include <arch/io.h>
 #include "chip.h"
 
 static void ti_pci1x2y_init(struct device *dev)
diff --git a/src/southbridge/ti/pci7420/cardbus.c b/src/southbridge/ti/pci7420/cardbus.c
index 3c885297ed..2c5679b931 100644
--- a/src/southbridge/ti/pci7420/cardbus.c
+++ b/src/southbridge/ti/pci7420/cardbus.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
diff --git a/src/southbridge/ti/pci7420/firewire.c b/src/southbridge/ti/pci7420/firewire.c
index 1379d59e75..4058540959 100644
--- a/src/southbridge/ti/pci7420/firewire.c
+++ b/src/southbridge/ti/pci7420/firewire.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
diff --git a/src/southbridge/ti/pcixx12/pcixx12.c b/src/southbridge/ti/pcixx12/pcixx12.c
index 6385ba9caa..fa1c67dbf2 100644
--- a/src/southbridge/ti/pcixx12/pcixx12.c
+++ b/src/southbridge/ti/pcixx12/pcixx12.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
-- 
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