From 2ed0aa258f4bcbf978998ccd3a76f7b1c2d3d031 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Tue, 5 Jan 2016 20:58:58 -0700 Subject: Correct some common spelling mistakes - occured -> occurred - accomodate -> accommodate - existant -> existent - asssertion -> assertion - manangement -> management - cotroller -> controller Change-Id: Ibd6663752466d691fabbdc216ea05f2b58ac12d1 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/12850 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Stefan Reinauer --- src/southbridge/amd/pi/hudson/smihandler.c | 2 +- src/southbridge/intel/bd82x6x/smihandler.c | 2 +- src/southbridge/intel/fsp_bd82x6x/smihandler.c | 2 +- src/southbridge/intel/fsp_i89xx/smihandler.c | 2 +- src/southbridge/intel/i82801dx/smihandler.c | 2 +- src/southbridge/intel/i82801gx/lpc.c | 4 ++-- src/southbridge/intel/i82801ix/early_init.c | 2 +- src/southbridge/intel/i82801ix/i82801ix.h | 2 +- src/southbridge/intel/i82801ix/smihandler.c | 2 +- src/southbridge/intel/ibexpeak/smihandler.c | 2 +- src/southbridge/intel/lynxpoint/smihandler.c | 2 +- src/southbridge/intel/sch/audio.c | 2 +- 12 files changed, 13 insertions(+), 13 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/amd/pi/hudson/smihandler.c b/src/southbridge/amd/pi/hudson/smihandler.c index 6f2504bbcc..af8c215ea9 100644 --- a/src/southbridge/amd/pi/hudson/smihandler.c +++ b/src/southbridge/amd/pi/hudson/smihandler.c @@ -64,7 +64,7 @@ static void process_gpe_smi(void) /* Only Bits [23:0] indicate GEVENT SMIs. */ if (status & gevent_mask) { - /* A GEVENT SMI occured */ + /* A GEVENT SMI occurred */ mainboard_smi_gpi(status & gevent_mask); } diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c index 098e8d43f1..f6fbac3f3f 100644 --- a/src/southbridge/intel/bd82x6x/smihandler.c +++ b/src/southbridge/intel/bd82x6x/smihandler.c @@ -855,7 +855,7 @@ void southbridge_smi_handler(void) if (southbridge_smi[i]) { southbridge_smi[i](); } else { - printk(BIOS_DEBUG, "SMI_STS[%d] occured, but no " + printk(BIOS_DEBUG, "SMI_STS[%d] occurred, but no " "handler available.\n", i); dump = 1; } diff --git a/src/southbridge/intel/fsp_bd82x6x/smihandler.c b/src/southbridge/intel/fsp_bd82x6x/smihandler.c index cbeff9d9ea..c320a0ba10 100644 --- a/src/southbridge/intel/fsp_bd82x6x/smihandler.c +++ b/src/southbridge/intel/fsp_bd82x6x/smihandler.c @@ -742,7 +742,7 @@ void southbridge_smi_handler(void) if (southbridge_smi[i]) { southbridge_smi[i](); } else { - printk(BIOS_DEBUG, "SMI_STS[%d] occured, but no " + printk(BIOS_DEBUG, "SMI_STS[%d] occurred, but no " "handler available.\n", i); dump = 1; } diff --git a/src/southbridge/intel/fsp_i89xx/smihandler.c b/src/southbridge/intel/fsp_i89xx/smihandler.c index b2cd07bc52..2c7ece278f 100644 --- a/src/southbridge/intel/fsp_i89xx/smihandler.c +++ b/src/southbridge/intel/fsp_i89xx/smihandler.c @@ -743,7 +743,7 @@ void southbridge_smi_handler(void) if (southbridge_smi[i]) { southbridge_smi[i](); } else { - printk(BIOS_DEBUG, "SMI_STS[%d] occured, but no " + printk(BIOS_DEBUG, "SMI_STS[%d] occurred, but no " "handler available.\n", i); dump = 1; } diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c index 34a5231fd8..dcd3df1a76 100644 --- a/src/southbridge/intel/i82801dx/smihandler.c +++ b/src/southbridge/intel/i82801dx/smihandler.c @@ -629,7 +629,7 @@ void southbridge_smi_handler(unsigned int node, smm_state_save_area_t *state_sav if (southbridge_smi[i]) southbridge_smi[i](node, state_save); else { - printk(BIOS_DEBUG, "SMI_STS[%d] occured, but no " + printk(BIOS_DEBUG, "SMI_STS[%d] occurred, but no " "handler available.\n", i); dump = 1; } diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 4e9711cb22..03df1a3a08 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -42,7 +42,7 @@ typedef struct southbridge_intel_i82801gx_config config_t; /** - * Set miscellanous static southbridge features. + * Set miscellaneous static southbridge features. * * @param dev PCI device with I/O APIC control registers */ @@ -200,7 +200,7 @@ static void i82801gx_power_options(device_t dev) } reg8 |= (3 << 4); /* avoid #S4 assertions */ - reg8 &= ~(1 << 3); /* minimum asssertion is 1 to 2 RTCCLK */ + reg8 &= ~(1 << 3); /* minimum assertion is 1 to 2 RTCCLK */ pci_write_config8(dev, GEN_PMCON_3, reg8); printk(BIOS_INFO, "Set power %s after power failure.\n", state); diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c index 1d6c649369..3d94b566b1 100644 --- a/src/southbridge/intel/i82801ix/early_init.c +++ b/src/southbridge/intel/i82801ix/early_init.c @@ -42,7 +42,7 @@ void i82801ix_early_init(void) /* Enable upper 128bytes of CMOS. */ RCBA32(0x3400) = (1 << 2); - /* Initialize power manangement initialization + /* Initialize power management initialization register early as it affects reboot behavior. */ /* Bit 20 activates global reset of host and ME on cf9 writes of 0x6 and 0xe (required if ME is disabled but present), bit 31 locks it. diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index d5bcbc2a42..afe4aa7064 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -193,7 +193,7 @@ #define RCBA_FD 0x3418 /* Function Disable, see below. */ #define RCBA_CG 0x341c #define RCBA_FDSW 0x3420 -#define RCBA_MAP 0x35f0 /* UHCI cotroller #6 remapping */ +#define RCBA_MAP 0x35f0 /* UHCI controller #6 remapping */ #define BUC_LAND (1 << 5) /* LAN */ #define FD_SAD2 (1 << 25) /* SATA #2 */ diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c index 7beb999900..9e04328989 100644 --- a/src/southbridge/intel/i82801ix/smihandler.c +++ b/src/southbridge/intel/i82801ix/smihandler.c @@ -511,7 +511,7 @@ void southbridge_smi_handler(unsigned int node, smm_state_save_area_t *state_sav if (southbridge_smi[i]) southbridge_smi[i](node, state_save); else { - printk(BIOS_DEBUG, "SMI_STS[%d] occured, but no " + printk(BIOS_DEBUG, "SMI_STS[%d] occurred, but no " "handler available.\n", i); dump = 1; } diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index 04ef75d238..fb9693036f 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -842,7 +842,7 @@ void southbridge_smi_handler(void) if (southbridge_smi[i]) { southbridge_smi[i](); } else { - printk(BIOS_DEBUG, "SMI_STS[%d] occured, but no " + printk(BIOS_DEBUG, "SMI_STS[%d] occurred, but no " "handler available.\n", i); dump = 1; } diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index 5e85ca5e5b..c8dc454d49 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -530,7 +530,7 @@ void southbridge_smi_handler(void) southbridge_smi[i](); } else { printk(BIOS_DEBUG, - "SMI_STS[%d] occured, but no " + "SMI_STS[%d] occurred, but no " "handler available.\n", i); } } diff --git a/src/southbridge/intel/sch/audio.c b/src/southbridge/intel/sch/audio.c index 11950ad8fb..765d8de2a4 100644 --- a/src/southbridge/intel/sch/audio.c +++ b/src/southbridge/intel/sch/audio.c @@ -81,7 +81,7 @@ static int codec_detect(u8 *base) mdelay(1); reg32 = read32(base + 0x0E); } while ((reg32 != 0) && --count); - /* Timeout occured */ + /* Timeout occurred */ if (!count) goto no_codec; -- cgit v1.2.3