From 30d0aa9cdb43f24275869456b3688d066f280e0e Mon Sep 17 00:00:00 2001 From: Nicolas Reinecke Date: Fri, 17 Oct 2014 12:08:05 +0200 Subject: lenovo/t520: Use native raminit over MRC blob Native raminit for sandy/ivybridge was introduced in: 7686a56 sandy/ivybridge: Native raminit. An additional current level is needed. Change-Id: Ied73d168045c25d37afa5d9d7073de7f9c6435c7 Signed-off-by: Nicolas Reinecke Signed-off-by: Philipp Deppenwiese Reviewed-on: http://review.coreboot.org/7098 Reviewed-by: Vladimir Serbinenko Tested-by: build bot (Jenkins) --- src/southbridge/intel/bd82x6x/early_usb_native.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/bd82x6x/early_usb_native.c b/src/southbridge/intel/bd82x6x/early_usb_native.c index 2afe8d3cf7..7ce55742e5 100644 --- a/src/southbridge/intel/bd82x6x/early_usb_native.c +++ b/src/southbridge/intel/bd82x6x/early_usb_native.c @@ -33,7 +33,7 @@ early_usb_init (const struct southbridge_usb_port *portmap) /* 3560 */ 0x024c8001, 0x000024a3, 0x00040002, 0x01000050, /* 3570 */ 0x02000772, 0x16000f9f, 0x1800ff4f, 0x0001d630, }; - const u32 currents[] = { 0x20000153, 0x20000f57, 0x2000055b, 0x20000f51 }; + const u32 currents[] = { 0x20000153, 0x20000f57, 0x2000055b, 0x20000f51 , 0x2000094a }; int i; /* Activate PMBAR. */ pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, DEFAULT_PMBASE | 1); -- cgit v1.2.3