From 32664fd32355d2998e446c7e058e365bda3bde77 Mon Sep 17 00:00:00 2001 From: Tristan Corrick Date: Wed, 31 Oct 2018 02:27:48 +1300 Subject: sb/intel/lynxpoint: Add a common platform.asl file The platform.asl file is copied from sb/intel/bd82x6x, and also matches the contents deleted from each mainboard's platform.asl. Tested on an ASRock H81M-HDS and a Google Peppy board (variant of Slippy). No issues arose from this patch. Change-Id: I539e401ce9af83070f69147526ca3b1c122f042c Signed-off-by: Tristan Corrick Reviewed-on: https://review.coreboot.org/29386 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/southbridge/intel/lynxpoint/acpi/platform.asl | 53 +++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 src/southbridge/intel/lynxpoint/acpi/platform.asl (limited to 'src/southbridge') diff --git a/src/southbridge/intel/lynxpoint/acpi/platform.asl b/src/southbridge/intel/lynxpoint/acpi/platform.asl new file mode 100644 index 0000000000..e37066887b --- /dev/null +++ b/src/southbridge/intel/lynxpoint/acpi/platform.asl @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* The APM port can be used for generating software SMIs */ + +OperationRegion (APMP, SystemIO, 0xb2, 2) +Field (APMP, ByteAcc, NoLock, Preserve) +{ + APMC, 8, // APM command + APMS, 8 // APM status +} + + +/* Port 80 POST */ + +OperationRegion (POST, SystemIO, 0x80, 1) +Field (POST, ByteAcc, Lock, Preserve) +{ + DBG0, 8 +} + +/* SMI I/O Trap */ +Method(TRAP, 1, Serialized) +{ + Store (Arg0, SMIF) // SMI Function + Store (0, TRP0) // Generate trap + Return (SMIF) // Return value of SMI handler +} + +/* The _PIC method is called by the OS to choose between interrupt + * routing via the i8259 interrupt controller or the APIC. + * + * _PIC is called with a parameter of 0 for i8259 configuration and + * with a parameter of 1 for Local Apic/IOAPIC configuration. + */ + +Method(_PIC, 1) +{ + // Remember the OS' IRQ routing choice. + Store(Arg0, PICM) +} -- cgit v1.2.3