From 6962b6ecd395093e63824bb337bbb45492d2ce48 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 13 Feb 2021 16:12:47 +0200 Subject: sb,soc/amd: Move _PIC method to global scope MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix regression with commit aa969e887a ACPI: Move PICM declaration. While mentioned in the commit message there already, the default value for AMD boards changed from IOAPIC mode to PIC mode. ACPI 6.3 spec has this text regarding _PIC method: If the platform CPU architecture supports PIC mode and the method is never called, the platform runtime firmware must assume PIC mode. If MADT has IOAPIC entries, OS will want to change to APIC model. But the method _PIC was not in the global scope so it could not be called and therefore _PRT continued to report PIC model interrupt routing. Already fixed for soc/amd/picasso in commit 839f668. Change-Id: I7f3bb0d45946cec315694de1d540fea4d828348e Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50635 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Angel Pons Reviewed-by: Felix Held Reviewed-by: Arthur Heymans Reviewed-by: Paul Menzel --- src/southbridge/amd/agesa/hudson/acpi/pci_int.asl | 2 +- src/southbridge/amd/cimx/sb800/acpi/pcie.asl | 2 +- src/southbridge/amd/pi/hudson/acpi/pci_int.asl | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl b/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl index a01fb5b700..8fc5b4dd32 100644 --- a/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl +++ b/src/southbridge/amd/agesa/hudson/acpi/pci_int.asl @@ -103,7 +103,7 @@ P3PR, 1, } - Method(_PIC, 0x01, NotSerialized) + Method(\_PIC, 0x01, NotSerialized) { If (Arg0) { diff --git a/src/southbridge/amd/cimx/sb800/acpi/pcie.asl b/src/southbridge/amd/cimx/sb800/acpi/pcie.asl index a154fd80e0..3d32e32e00 100644 --- a/src/southbridge/amd/cimx/sb800/acpi/pcie.asl +++ b/src/southbridge/amd/cimx/sb800/acpi/pcie.asl @@ -132,7 +132,7 @@ Scope(\_SB) { P3PR, 1, } - Method(_PIC, 0x01, NotSerialized) + Method(\_PIC, 0x01, NotSerialized) { If (Arg0) { diff --git a/src/southbridge/amd/pi/hudson/acpi/pci_int.asl b/src/southbridge/amd/pi/hudson/acpi/pci_int.asl index a01fb5b700..8fc5b4dd32 100644 --- a/src/southbridge/amd/pi/hudson/acpi/pci_int.asl +++ b/src/southbridge/amd/pi/hudson/acpi/pci_int.asl @@ -103,7 +103,7 @@ P3PR, 1, } - Method(_PIC, 0x01, NotSerialized) + Method(\_PIC, 0x01, NotSerialized) { If (Arg0) { -- cgit v1.2.3