From 9d9518ff54607f8576d45a8664bc9cf88981d6db Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Tue, 6 May 2008 16:56:47 +0000 Subject: cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doing a pci_write_config8. Signed-off-by: Marc Jones Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3282 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/cs5536/cs5536_ide.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/southbridge') diff --git a/src/southbridge/amd/cs5536/cs5536_ide.c b/src/southbridge/amd/cs5536/cs5536_ide.c index c20fada517..b0d711c948 100644 --- a/src/southbridge/amd/cs5536/cs5536_ide.c +++ b/src/southbridge/amd/cs5536/cs5536_ide.c @@ -43,7 +43,7 @@ static void ide_init(struct device *dev) // NOTE: Only 32-bit writes to the data buffer are allowed when PWB is set ide_cfg = pci_read_config32(dev, IDE_CFG); ide_cfg |= CHANEN | PWB; - pci_write_config8(dev, IDE_CFG, ide_cfg); + pci_write_config32(dev, IDE_CFG, ide_cfg); } static void ide_enable(struct device *dev) -- cgit v1.2.3