From ad787e18e0ed24495132d0e9e638ed835afad354 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Mon, 30 Sep 2019 04:14:19 +0300
Subject: intel/i945,i82801gx: Refactor early PCI bridge reset
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Change-Id: Ibd5cd2afc8e41cc50abdda0fb7d063073c3acdc1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35678
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/southbridge/intel/i82801gx/i82801gx.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/southbridge')

diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index d615b403ac..fec891982f 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -39,6 +39,8 @@
 void i82801gx_enable(struct device *dev);
 #endif
 
+void ich7_p2p_secondary_reset(void);
+
 void enable_smbus(void);
 
 #if ENV_ROMSTAGE
-- 
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