From d44221f9c8f3686e040ff9481829315068b321a3 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Thu, 4 Oct 2018 23:42:42 +0200 Subject: Move compiler.h to commonlib Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. While we are at it, always include it via GCC's `-include` switch. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/28927 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/southbridge/amd/sb700/sata.c | 1 - src/southbridge/intel/bd82x6x/me.h | 2 -- src/southbridge/intel/bd82x6x/nvs.h | 1 - src/southbridge/intel/common/gpio.h | 1 - src/southbridge/intel/common/smihandler.c | 1 - src/southbridge/intel/common/spi.c | 1 - src/southbridge/intel/fsp_bd82x6x/gpio.h | 2 -- src/southbridge/intel/fsp_bd82x6x/me.h | 2 -- src/southbridge/intel/fsp_bd82x6x/nvs.h | 1 - src/southbridge/intel/fsp_i89xx/gpio.h | 2 -- src/southbridge/intel/fsp_i89xx/me.h | 2 -- src/southbridge/intel/fsp_i89xx/nvs.h | 1 - src/southbridge/intel/fsp_rangeley/gpio.h | 2 -- src/southbridge/intel/fsp_rangeley/nvs.h | 2 -- src/southbridge/intel/fsp_rangeley/spi.c | 1 - src/southbridge/intel/i82801dx/nvs.h | 2 -- src/southbridge/intel/i82801gx/nvs.h | 2 -- src/southbridge/intel/i82801ix/nvs.h | 2 -- src/southbridge/intel/i82801jx/nvs.h | 2 -- src/southbridge/intel/ibexpeak/me.h | 2 -- src/southbridge/intel/ibexpeak/nvs.h | 1 - src/southbridge/intel/lynxpoint/lp_gpio.h | 2 -- src/southbridge/intel/lynxpoint/me.h | 2 -- src/southbridge/intel/lynxpoint/nvs.h | 1 - src/southbridge/ricoh/rl5c476/rl5c476.h | 1 - 25 files changed, 39 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c index 6caffee9b5..1d1ac13890 100644 --- a/src/southbridge/amd/sb700/sata.c +++ b/src/southbridge/amd/sb700/sata.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include #include #include #include diff --git a/src/southbridge/intel/bd82x6x/me.h b/src/southbridge/intel/bd82x6x/me.h index b0f2a6e90b..270886485d 100644 --- a/src/southbridge/intel/bd82x6x/me.h +++ b/src/southbridge/intel/bd82x6x/me.h @@ -17,8 +17,6 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include - #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/bd82x6x/nvs.h b/src/southbridge/intel/bd82x6x/nvs.h index 537139dde1..655851105e 100644 --- a/src/southbridge/intel/bd82x6x/nvs.h +++ b/src/southbridge/intel/bd82x6x/nvs.h @@ -15,7 +15,6 @@ */ #include -#include #include #include "vendorcode/google/chromeos/gnvs.h" diff --git a/src/southbridge/intel/common/gpio.h b/src/southbridge/intel/common/gpio.h index 97b7783400..019009ef18 100644 --- a/src/southbridge/intel/common/gpio.h +++ b/src/southbridge/intel/common/gpio.h @@ -17,7 +17,6 @@ #define INTEL_COMMON_GPIO_H #include -#include /* ICH7 GPIOBASE */ #define GPIO_USE_SEL 0x00 diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index 0fd8ab0506..8dce9bb129 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 180a629e32..31cdb3391d 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include diff --git a/src/southbridge/intel/fsp_bd82x6x/gpio.h b/src/southbridge/intel/fsp_bd82x6x/gpio.h index 3279be8ee5..a46a8fee33 100644 --- a/src/southbridge/intel/fsp_bd82x6x/gpio.h +++ b/src/southbridge/intel/fsp_bd82x6x/gpio.h @@ -17,8 +17,6 @@ #ifndef INTEL_BD82X6X_GPIO_H #define INTEL_BD82X6X_GPIO_H -#include - #define GPIO_MODE_NATIVE 0 #define GPIO_MODE_GPIO 1 #define GPIO_MODE_NONE 1 diff --git a/src/southbridge/intel/fsp_bd82x6x/me.h b/src/southbridge/intel/fsp_bd82x6x/me.h index b0f2a6e90b..270886485d 100644 --- a/src/southbridge/intel/fsp_bd82x6x/me.h +++ b/src/southbridge/intel/fsp_bd82x6x/me.h @@ -17,8 +17,6 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include - #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/fsp_bd82x6x/nvs.h b/src/southbridge/intel/fsp_bd82x6x/nvs.h index c8af5b989a..6d51ec114b 100644 --- a/src/southbridge/intel/fsp_bd82x6x/nvs.h +++ b/src/southbridge/intel/fsp_bd82x6x/nvs.h @@ -15,7 +15,6 @@ */ #include -#include #include "vendorcode/google/chromeos/gnvs.h" typedef struct global_nvs_t { diff --git a/src/southbridge/intel/fsp_i89xx/gpio.h b/src/southbridge/intel/fsp_i89xx/gpio.h index b89ab3ed37..95cf70a78a 100644 --- a/src/southbridge/intel/fsp_i89xx/gpio.h +++ b/src/southbridge/intel/fsp_i89xx/gpio.h @@ -17,8 +17,6 @@ #ifndef INTEL_I89XX_GPIO_H #define INTEL_I89XX_GPIO_H -#include - #define GPIO_MODE_NATIVE 0 #define GPIO_MODE_GPIO 1 #define GPIO_MODE_NONE 1 diff --git a/src/southbridge/intel/fsp_i89xx/me.h b/src/southbridge/intel/fsp_i89xx/me.h index b0f2a6e90b..270886485d 100644 --- a/src/southbridge/intel/fsp_i89xx/me.h +++ b/src/southbridge/intel/fsp_i89xx/me.h @@ -17,8 +17,6 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include - #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/fsp_i89xx/nvs.h b/src/southbridge/intel/fsp_i89xx/nvs.h index c8af5b989a..6d51ec114b 100644 --- a/src/southbridge/intel/fsp_i89xx/nvs.h +++ b/src/southbridge/intel/fsp_i89xx/nvs.h @@ -15,7 +15,6 @@ */ #include -#include #include "vendorcode/google/chromeos/gnvs.h" typedef struct global_nvs_t { diff --git a/src/southbridge/intel/fsp_rangeley/gpio.h b/src/southbridge/intel/fsp_rangeley/gpio.h index d8fbcb985d..1a916f4dcc 100644 --- a/src/southbridge/intel/fsp_rangeley/gpio.h +++ b/src/southbridge/intel/fsp_rangeley/gpio.h @@ -17,8 +17,6 @@ #ifndef INTEL_RANGELEY_GPIO_H #define INTEL_RANGELEY_GPIO_H -#include - #define GPIO_MODE_NATIVE 0 #define GPIO_MODE_GPIO 1 #define GPIO_MODE_NONE 1 diff --git a/src/southbridge/intel/fsp_rangeley/nvs.h b/src/southbridge/intel/fsp_rangeley/nvs.h index fd3329051d..12de76999d 100644 --- a/src/southbridge/intel/fsp_rangeley/nvs.h +++ b/src/southbridge/intel/fsp_rangeley/nvs.h @@ -14,8 +14,6 @@ * GNU General Public License for more details. */ -#include - typedef struct { /* Miscellaneous */ u16 osys; /* 0x00 - Operating System */ diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c index 0512bcf19f..98ae708070 100644 --- a/src/southbridge/intel/fsp_rangeley/spi.c +++ b/src/southbridge/intel/fsp_rangeley/spi.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include diff --git a/src/southbridge/intel/i82801dx/nvs.h b/src/southbridge/intel/i82801dx/nvs.h index bdc6b45a56..3a72f4d7e9 100644 --- a/src/southbridge/intel/i82801dx/nvs.h +++ b/src/southbridge/intel/i82801dx/nvs.h @@ -13,8 +13,6 @@ * GNU General Public License for more details. */ -#include - typedef struct { /* Miscellaneous */ u16 osys; /* 0x00 - Operating System */ diff --git a/src/southbridge/intel/i82801gx/nvs.h b/src/southbridge/intel/i82801gx/nvs.h index 483eddb420..04e62db809 100644 --- a/src/southbridge/intel/i82801gx/nvs.h +++ b/src/southbridge/intel/i82801gx/nvs.h @@ -13,8 +13,6 @@ * GNU General Public License for more details. */ -#include - typedef struct { /* Miscellaneous */ u16 osys; /* 0x00 - Operating System */ diff --git a/src/southbridge/intel/i82801ix/nvs.h b/src/southbridge/intel/i82801ix/nvs.h index 483eddb420..04e62db809 100644 --- a/src/southbridge/intel/i82801ix/nvs.h +++ b/src/southbridge/intel/i82801ix/nvs.h @@ -13,8 +13,6 @@ * GNU General Public License for more details. */ -#include - typedef struct { /* Miscellaneous */ u16 osys; /* 0x00 - Operating System */ diff --git a/src/southbridge/intel/i82801jx/nvs.h b/src/southbridge/intel/i82801jx/nvs.h index 16c49bb18b..ca66985746 100644 --- a/src/southbridge/intel/i82801jx/nvs.h +++ b/src/southbridge/intel/i82801jx/nvs.h @@ -13,8 +13,6 @@ * GNU General Public License for more details. */ -#include - typedef struct { /* Miscellaneous */ u16 osys; /* 0x00 - Operating System */ diff --git a/src/southbridge/intel/ibexpeak/me.h b/src/southbridge/intel/ibexpeak/me.h index 6423d8d29d..be65cc5454 100644 --- a/src/southbridge/intel/ibexpeak/me.h +++ b/src/southbridge/intel/ibexpeak/me.h @@ -17,8 +17,6 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include - #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/ibexpeak/nvs.h b/src/southbridge/intel/ibexpeak/nvs.h index 7b9fd249fc..36db12c043 100644 --- a/src/southbridge/intel/ibexpeak/nvs.h +++ b/src/southbridge/intel/ibexpeak/nvs.h @@ -15,7 +15,6 @@ */ #include -#include #include "vendorcode/google/chromeos/gnvs.h" typedef struct global_nvs_t { diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.h b/src/southbridge/intel/lynxpoint/lp_gpio.h index 6c21db228e..fa6d700fd9 100644 --- a/src/southbridge/intel/lynxpoint/lp_gpio.h +++ b/src/southbridge/intel/lynxpoint/lp_gpio.h @@ -16,8 +16,6 @@ #ifndef INTEL_LYNXPOINT_LP_GPIO_H #define INTEL_LYNXPOINT_LP_GPIO_H -#include - /* LynxPoint LP GPIOBASE Registers */ #define GPIO_OWNER(set) (0x00 + ((set) * 4)) #define GPIO_PIRQ_APIC_EN 0x10 diff --git a/src/southbridge/intel/lynxpoint/me.h b/src/southbridge/intel/lynxpoint/me.h index cef2e55a24..775b4eced6 100644 --- a/src/southbridge/intel/lynxpoint/me.h +++ b/src/southbridge/intel/lynxpoint/me.h @@ -17,8 +17,6 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include - #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/lynxpoint/nvs.h b/src/southbridge/intel/lynxpoint/nvs.h index fd0d8bc961..397cdf2289 100644 --- a/src/southbridge/intel/lynxpoint/nvs.h +++ b/src/southbridge/intel/lynxpoint/nvs.h @@ -15,7 +15,6 @@ */ #include -#include #include "vendorcode/google/chromeos/gnvs.h" typedef struct global_nvs_t { diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.h b/src/southbridge/ricoh/rl5c476/rl5c476.h index 0639fd1193..646650a42a 100644 --- a/src/southbridge/ricoh/rl5c476/rl5c476.h +++ b/src/southbridge/ricoh/rl5c476/rl5c476.h @@ -17,7 +17,6 @@ /* rl5c476 routines and defines*/ -#include #include -- cgit v1.2.3