From d5d4fbc072c489e469df2c703a289be0d5f3bbac Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 31 May 2020 01:03:59 +0200 Subject: sb/intel/lynxpoint: Restore lost PCI_COMMAND_MASTER bits Commit 73ae076 "fixed" accesses to the PCI command register that were not 16 bits, but also lost some bits to be written in the process. Change-Id: I4eb62a0433a4563827a69c9e39c17ddd2eb8cd23 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/41945 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes Reviewed-by: Matt DeVillier --- src/southbridge/intel/lynxpoint/early_usb.c | 2 +- src/southbridge/intel/lynxpoint/me_9.x.c | 2 +- src/southbridge/intel/lynxpoint/serialio.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'src/southbridge') diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c index 06ddd0821d..a753681ce0 100644 --- a/src/southbridge/intel/lynxpoint/early_usb.c +++ b/src/southbridge/intel/lynxpoint/early_usb.c @@ -25,7 +25,7 @@ static void enable_usb_bar_on_device(pci_devfn_t dev, u32 bar) { pci_write_config32(dev, PCI_BASE_ADDRESS_0, bar); - pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); } void enable_usb_bar(void) diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c index 8914edf9ce..6223a3d583 100644 --- a/src/southbridge/intel/lynxpoint/me_9.x.c +++ b/src/southbridge/intel/lynxpoint/me_9.x.c @@ -735,7 +735,7 @@ static int intel_mei_setup(struct device *dev) mei_base_address = (u32 *)(uintptr_t)res->base; /* Ensure Memory and Bus Master bits are set */ - pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); /* Clean up status for next message */ read_host_csr(&host); diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c index e093508e01..adb9067dbc 100644 --- a/src/southbridge/intel/lynxpoint/serialio.c +++ b/src/southbridge/intel/lynxpoint/serialio.c @@ -137,7 +137,7 @@ static void serialio_init(struct device *dev) printk(BIOS_DEBUG, "Initializing Serial IO device\n"); /* Ensure memory and bus master are enabled */ - pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY); + pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); /* Find BAR0 and BAR1 */ bar0 = find_resource(dev, PCI_BASE_ADDRESS_0); -- cgit v1.2.3