From de640781020b10e72dd6a5cda26cab10932e94fe Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Tue, 3 Dec 2019 07:30:26 +0200
Subject: bootblock: Provide some common prototypes
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The split of bootblock initialisation to cpu, northbridge and
southbridge is not specific to intel at all, create new header
<arch/bootblock.h> as AMD will want some of these too.

Change-Id: I702cc6bad4afee4f61acf58b9155608b28eb417e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/southbridge/intel/bd82x6x/bootblock.c   | 2 +-
 src/southbridge/intel/i82371eb/bootblock.c  | 2 +-
 src/southbridge/intel/i82801dx/bootblock.c  | 2 +-
 src/southbridge/intel/i82801gx/bootblock.c  | 2 +-
 src/southbridge/intel/i82801ix/bootblock.c  | 2 +-
 src/southbridge/intel/i82801jx/bootblock.c  | 2 +-
 src/southbridge/intel/ibexpeak/bootblock.c  | 2 +-
 src/southbridge/intel/lynxpoint/bootblock.c | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

(limited to 'src/southbridge')

diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c
index 1a8242f8d4..f2e32da130 100644
--- a/src/southbridge/intel/bd82x6x/bootblock.c
+++ b/src/southbridge/intel/bd82x6x/bootblock.c
@@ -13,7 +13,7 @@
  * GNU General Public License for more details.
  */
 
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 #include "pch.h"
 
diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c
index a6d62e03e0..711b317e16 100644
--- a/src/southbridge/intel/i82371eb/bootblock.c
+++ b/src/southbridge/intel/i82371eb/bootblock.c
@@ -15,10 +15,10 @@
  */
 
 #include <stdint.h>
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <device/pci_type.h>
-#include <cpu/intel/car/bootblock.h>
 #include "i82371eb.h"
 
 #define PCI_ID(VENDOR_ID, DEVICE_ID) \
diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c
index ef348553cc..31452a58cf 100644
--- a/src/southbridge/intel/i82801dx/bootblock.c
+++ b/src/southbridge/intel/i82801dx/bootblock.c
@@ -11,7 +11,7 @@
  * GNU General Public License for more details.
  */
 
-#include <cpu/intel/car/bootblock.h>
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
 
 void bootblock_early_southbridge_init(void)
diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c
index 4c464ff920..f470526589 100644
--- a/src/southbridge/intel/i82801gx/bootblock.c
+++ b/src/southbridge/intel/i82801gx/bootblock.c
@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "i82801gx.h"
 
 static void enable_spi_prefetch(void)
diff --git a/src/southbridge/intel/i82801ix/bootblock.c b/src/southbridge/intel/i82801ix/bootblock.c
index 0b50d61fba..b2701514a9 100644
--- a/src/southbridge/intel/i82801ix/bootblock.c
+++ b/src/southbridge/intel/i82801ix/bootblock.c
@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "i82801ix.h"
 
 
diff --git a/src/southbridge/intel/i82801jx/bootblock.c b/src/southbridge/intel/i82801jx/bootblock.c
index b6016793c2..567679ebcc 100644
--- a/src/southbridge/intel/i82801jx/bootblock.c
+++ b/src/southbridge/intel/i82801jx/bootblock.c
@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "i82801jx.h"
 
 static void enable_spi_prefetch(void)
diff --git a/src/southbridge/intel/ibexpeak/bootblock.c b/src/southbridge/intel/ibexpeak/bootblock.c
index c8b1d6ef31..0076864db9 100644
--- a/src/southbridge/intel/ibexpeak/bootblock.c
+++ b/src/southbridge/intel/ibexpeak/bootblock.c
@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "pch.h"
 #include "chip.h"
 
diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c
index 39e69257eb..21475745c1 100644
--- a/src/southbridge/intel/lynxpoint/bootblock.c
+++ b/src/southbridge/intel/lynxpoint/bootblock.c
@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/bootblock.h>
 #include <device/pci_ops.h>
-#include <cpu/intel/car/bootblock.h>
 #include "pch.h"
 
 /*
-- 
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