From b3da970964339dabeedd4384ae21ce4917825937 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Fri, 12 Mar 2004 23:38:20 +0000 Subject: starting point for 87366 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/superio/NSC/pc87366/superio.c | 77 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 src/superio/NSC/pc87366/superio.c (limited to 'src/superio/NSC/pc87366/superio.c') diff --git a/src/superio/NSC/pc87366/superio.c b/src/superio/NSC/pc87366/superio.c new file mode 100644 index 0000000000..11da482582 --- /dev/null +++ b/src/superio/NSC/pc87366/superio.c @@ -0,0 +1,77 @@ +/* Copyright 2000 AG Electronics Ltd. */ +/* Copyright 2003-2004 Linux Networx */ +/* This code is distributed without warranty under the GPL v2 (see COPYING) */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "chip.h" +#include "pc87366.h" + +static void init(device_t dev) +{ + struct superio_NSC_pc87366_config *conf; + struct resource *res0, *res1; + /* Wishlist handle well known programming interfaces more + * generically. + */ + if (!dev->enable) { + return; + } + conf = dev->chip->chip_info; + switch(dev->path.u.pnp.device) { + case PC87366_SP1: + res0 = get_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + case PC87366_SP2: + res0 = get_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + case PC87366_KBCK: + res0 = get_resource(dev, PNP_IDX_IO0); + res1 = get_resource(dev, PNP_IDX_IO1); + init_pc_keyboard(res0->base, res1->base, &conf->keyboard); + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +static struct pnp_info pnp_dev_info[] = { + { &ops, PC87366_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, + { &ops, PC87366_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, + { &ops, PC87366_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, PC87366_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, PC87366_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, }, + { &ops, PC87366_KBCM, PNP_IRQ0 }, + { &ops, PC87366_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, + { &ops, PC87366_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87366_ACB, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87366_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } }, + { &ops, PC87366_WDT, PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } }, +}; + + +static void enumerate(struct chip *chip) +{ + pnp_enumerate(chip, sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), + &pnp_ops, pnp_dev_info); +} + +struct chip_control superio_NSC_pc87366_control = { + .enumerate = enumerate, + .name = "NSC 87366" +}; -- cgit v1.2.3