From a57ad8f2abc57fe23a17d1517c501572c0dcec71 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Wed, 28 Oct 2015 18:12:20 -0700 Subject: Drop SuperIO ite/it8661f All boards using this SuperIO have been removed from the tree already. Change-Id: Ifca91ae44ab222371808ff1e0027a7cbd4646b0a Signed-off-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/12243 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/superio/ite/Kconfig | 4 -- src/superio/ite/Makefile.inc | 1 - src/superio/ite/it8661f/Makefile.inc | 22 ---------- src/superio/ite/it8661f/early_serial.c | 80 ---------------------------------- src/superio/ite/it8661f/it8661f.h | 57 ------------------------ src/superio/ite/it8661f/superio.c | 66 ---------------------------- 6 files changed, 230 deletions(-) delete mode 100644 src/superio/ite/it8661f/Makefile.inc delete mode 100644 src/superio/ite/it8661f/early_serial.c delete mode 100644 src/superio/ite/it8661f/it8661f.h delete mode 100644 src/superio/ite/it8661f/superio.c (limited to 'src/superio') diff --git a/src/superio/ite/Kconfig b/src/superio/ite/Kconfig index 2043016297..0aaf9f4e1b 100644 --- a/src/superio/ite/Kconfig +++ b/src/superio/ite/Kconfig @@ -23,10 +23,6 @@ config SUPERIO_ITE_COMMON_ROMSTAGE bool -config SUPERIO_ITE_IT8661F - bool - select SUPERIO_ITE_COMMON_ROMSTAGE - config SUPERIO_ITE_IT8671F bool select SUPERIO_ITE_COMMON_ROMSTAGE diff --git a/src/superio/ite/Makefile.inc b/src/superio/ite/Makefile.inc index 2ee61f8dfc..11ea8d6265 100644 --- a/src/superio/ite/Makefile.inc +++ b/src/superio/ite/Makefile.inc @@ -20,7 +20,6 @@ ## include generic ite pre-ram stage driver romstage-$(CONFIG_SUPERIO_ITE_COMMON_ROMSTAGE) += common/early_serial.c -subdirs-y += it8661f subdirs-y += it8671f subdirs-y += it8712f subdirs-y += it8716f diff --git a/src/superio/ite/it8661f/Makefile.inc b/src/superio/ite/it8661f/Makefile.inc deleted file mode 100644 index 9286db5f2d..0000000000 --- a/src/superio/ite/it8661f/Makefile.inc +++ /dev/null @@ -1,22 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2006 Uwe Hermann -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc. -## - -romstage-$(CONFIG_SUPERIO_ITE_IT8661F) += early_serial.c -ramstage-$(CONFIG_SUPERIO_ITE_IT8661F) += superio.c diff --git a/src/superio/ite/it8661f/early_serial.c b/src/superio/ite/it8661f/early_serial.c deleted file mode 100644 index 9efeb97b33..0000000000 --- a/src/superio/ite/it8661f/early_serial.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2006 Uwe Hermann - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include -#include -#include "it8661f.h" - -/* Perform MB PnP setup to put the SIO chip at 0x3f0. */ -/* Base address 0x3f0: 0x86 0x80 0x55 0x55. */ -/* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */ -/* Base address 0x370: 0x86 0x80 0xaa 0x55. */ -static void pnp_enter_ext_func_mode(pnp_devfn_t dev) -{ - int i; - u16 port = dev >> 8; - - /* TODO: Don't hardcode Super I/O config port to 0x3f0. */ - outb(0x86, IT8661F_ISA_PNP_PORT); - outb(0x80, IT8661F_ISA_PNP_PORT); - outb(0x55, IT8661F_ISA_PNP_PORT); - outb(0x55, IT8661F_ISA_PNP_PORT); - - /* Sequentially write the 32 special values. */ - for (i = 0; i < 32; i++) - outb(init_values[i], port); -} - -static void pnp_exit_ext_func_mode(pnp_devfn_t dev) -{ - pnp_write_config(dev, IT8661F_REG_CC, (1 << 1)); -} - -/* - * The logical devices will only be involved in the ISA PnP sequence if their - * respective enable bits in IT8661F_REG_LDE are set. - * - * TODO: Find out if we actually need this (we use MB PnP mode). - * - * Bits: FDC (0), Com1 (1), Com2 (2), PP (3), IR (4). Bits 5-7 are reserved. - */ -static void it8661f_enable_logical_devices(pnp_devfn_t dev) -{ - pnp_enter_ext_func_mode(dev); - pnp_write_config(dev, IT8661F_REG_LDE, 0x1f); - pnp_exit_ext_func_mode(dev); -} - -static void it8661f_set_clkin(pnp_devfn_t dev, u8 clkin) -{ - pnp_enter_ext_func_mode(dev); - pnp_write_config(dev, IT8661F_REG_SWSUSP, (clkin << 1)); - pnp_exit_ext_func_mode(dev); -} - -void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase) -{ - pnp_enter_ext_func_mode(dev); - pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_set_iobase(dev, PNP_IDX_IO0, iobase); - pnp_set_enable(dev, 1); - pnp_exit_ext_func_mode(dev); -} diff --git a/src/superio/ite/it8661f/it8661f.h b/src/superio/ite/it8661f/it8661f.h deleted file mode 100644 index 3dc6bab589..0000000000 --- a/src/superio/ite/it8661f/it8661f.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2006 Uwe Hermann - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#ifndef SUPERIO_ITE_IT8661F_H -#define SUPERIO_ITE_IT8661F_H - -/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8661_2.asp */ - -/* Logical device numbers (LDNs). */ -#define IT8661F_FDC 0x00 /* Floppy */ -#define IT8661F_SP1 0x01 /* Com1 */ -#define IT8661F_SP2 0x02 /* Com2 */ -#define IT8661F_PP 0x03 /* Parallel port */ -#define IT8661F_IR 0x04 /* IR */ -#define IT8661F_GPIO 0x05 /* GPIO & Alternate Function Configuration */ - -/* Register and bit definitions. */ -#define IT8661F_REG_CC 0x02 /* Configure Control (write-only). */ -#define IT8661F_REG_LDE 0x23 /* PnP Logical Device Enable. */ -#define IT8661F_REG_SWSUSP 0x24 /* Software Suspend + Clock Select. */ - -#define IT8661F_ISA_PNP_PORT 0x0279 /* Write-only. */ - -#define IT8661F_CLKIN_24_MHZ 0 -#define IT8661F_CLKIN_48_MHZ 1 - -/* - * Special values used for entering MB PnP mode. The first four bytes of - * each line determine the address port, the last four are data. - */ -static const u8 init_values[] = { - 0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe, - 0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61, - 0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1, - 0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39, -}; - -void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase); - -#endif /* SUPERIO_ITE_IT8661F_H */ diff --git a/src/superio/ite/it8661f/superio.c b/src/superio/ite/it8661f/superio.c deleted file mode 100644 index 678d0c5423..0000000000 --- a/src/superio/ite/it8661f/superio.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2006 Uwe Hermann - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -#include -#include -#include -#include "it8661f.h" - -/* TODO: Add pnp_enter_ext_func_mode() etc. and wrap functions. */ - -static void init(struct device *dev) -{ - if (!dev->enabled) - return; - - switch (dev->path.pnp.device) { - case IT8661F_FDC: /* TODO. */ - break; - case IT8661F_PP: /* TODO. */ - break; - case IT8661F_IR: /* TODO. */ - break; - } -} - -static struct device_operations ops = { - .read_resources = pnp_read_resources, - .set_resources = pnp_set_resources, - .enable_resources = pnp_enable_resources, - .enable = pnp_enable, - .init = init, -}; - -/* TODO: FDC, PP, IR, GPIO. */ -static struct pnp_info pnp_dev_info[] = { - { &ops, IT8661F_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, - { &ops, IT8661F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0}, }, -}; - -static void enable_dev(struct device *dev) -{ - pnp_enable_devices(dev, &pnp_ops, - ARRAY_SIZE(pnp_dev_info), pnp_dev_info); -} - -struct chip_operations superio_ite_it8661f_ops = { - CHIP_NAME("ITE IT8661F Super I/O") - .enable_dev = enable_dev, -}; -- cgit v1.2.3