From 8656914cda9a43df8abd9aa56f73cb179da0570d Mon Sep 17 00:00:00 2001 From: Konstantin Aladyshev Date: Tue, 1 Aug 2017 14:29:20 +0300 Subject: AGESA: Correct PCI function number for MEM_GET(SET)REG outputs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PCI function number takes only 3 bits, therefore correct bitmask for it is 0x7. Change-Id: Id41700be0474eecc4d5b5173c4d5686c421735e3 Signed-off-by: Konstantin Aladyshev Reviewed-on: https://review.coreboot.org/20837 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Paul Menzel --- src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/vendorcode/amd/agesa/f15tn') diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c index ca2afb4979..5bf1093c6f 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/TN/mnregtn.c @@ -235,7 +235,7 @@ MemNCmnGetSetFieldTN ( if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) { IDS_HDT_CONSOLE (MEM_GETREG, "~Dev%x Dct%d Fn%d_%03x = %x\n", NBPtr->PciAddr.Address.Device, NBPtr->Dct, - (Address >> 12) & 0xF, Address & 0xFFF, Value); + (Address >> 12) & 0x7, Address & 0xFFF, Value); } } else if (Type == DCT_PHY_ACCESS) { if (IsPhyDirectAccess && (NumOfInstances > 1)) { @@ -266,7 +266,7 @@ MemNCmnGetSetFieldTN ( if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) && (FieldName != BFDctCfgSel)) { IDS_HDT_CONSOLE (MEM_SETREG, "~Dev%x Dct%d Fn%d_%03x [%d:%d] = %x\n", NBPtr->PciAddr.Address.Device, NBPtr->Dct, - (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field); + (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field); } } else if (Type == DCT_PHY_ACCESS) { MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value); -- cgit v1.2.3