From 8b7bda40f140e3d849a91660d2c84a4c324c8901 Mon Sep 17 00:00:00 2001 From: Mike Banon Date: Sat, 15 Aug 2020 10:30:19 +0300 Subject: nb/amd/agesa: define DDR3_SPD_SIZE as a common value Move a size of DDR3 SPD memory (always 256 bytes) to a common define. Signed-off-by: Mike Banon Change-Id: I80c89ff6e44526e1d75b0e933b21801ed17c98c0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44498 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/vendorcode/amd/agesa/f16kb/AGESA.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/vendorcode/amd/agesa/f16kb') diff --git a/src/vendorcode/amd/agesa/f16kb/AGESA.h b/src/vendorcode/amd/agesa/f16kb/AGESA.h index 7e43de416c..853fdc99e6 100644 --- a/src/vendorcode/amd/agesa/f16kb/AGESA.h +++ b/src/vendorcode/amd/agesa/f16kb/AGESA.h @@ -1621,9 +1621,10 @@ typedef enum { /// /// SPD Data for each DIMM. /// +#define DDR3_SPD_SIZE 256 typedef struct _SPD_DEF_STRUCT { IN BOOLEAN DimmPresent; ///< Indicates that the DIMM is present and Data is valid - IN UINT8 Data[256]; ///< Buffer for 256 Bytes of SPD data from DIMM + IN UINT8 Data[DDR3_SPD_SIZE]; ///< Buffer for 256 Bytes of SPD data from DIMM } SPD_DEF_STRUCT; /// -- cgit v1.2.3