From 06ece7de93a6e0820fa21a86d2312c6fd9209aea Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Fri, 14 Feb 2014 00:30:04 -0600 Subject: chromeos: provide option to dynamically allocate ram oops buffer Fixing the location of the ram oops buffer can lead to certain kernel and boot loaders being confused when there is a ram reservation low in the address space. Alternatively provide a mechanism to allocate the ram oops buffer in cbmem. As cbmem is usually high in the address space it avoids low reservation confusion. The patch uncondtionally provides a GOOG9999 ACPI device with a single memory resource describing the memory region used for the ramoops region. BUG=None BRANCH=baytrail,haswell TEST=Built and booted with and w/o dynamic ram oops. With the corresponding kernel change things behave correctly. Change-Id: Ide2bb4434768c9f9b90e125adae4324cb1d2d073 Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/5257 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/vendorcode/google/chromeos/acpi/chromeos.asl | 2 ++ src/vendorcode/google/chromeos/acpi/gnvs.asl | 4 ++- src/vendorcode/google/chromeos/acpi/ramoops.asl | 43 ++++++++++++++++++++++++ 3 files changed, 48 insertions(+), 1 deletion(-) create mode 100644 src/vendorcode/google/chromeos/acpi/ramoops.asl (limited to 'src/vendorcode/google/chromeos/acpi') diff --git a/src/vendorcode/google/chromeos/acpi/chromeos.asl b/src/vendorcode/google/chromeos/acpi/chromeos.asl index 278296c939..8f63f122d5 100644 --- a/src/vendorcode/google/chromeos/acpi/chromeos.asl +++ b/src/vendorcode/google/chromeos/acpi/chromeos.asl @@ -107,3 +107,5 @@ Device (CRHW) Return (TSLM) } } + +#include "ramoops.asl" diff --git a/src/vendorcode/google/chromeos/acpi/gnvs.asl b/src/vendorcode/google/chromeos/acpi/gnvs.asl index dc4a0bfbe8..5377a8540f 100644 --- a/src/vendorcode/google/chromeos/acpi/gnvs.asl +++ b/src/vendorcode/google/chromeos/acpi/gnvs.asl @@ -34,4 +34,6 @@ VBT9, 32, // 0x196 - FMAP base address CHVD, 24576, // 0x19a - VDAT space filled by verified boot VBTA, 32, // 0xd9a - pointer to smbios FWID MEHH, 256, // 0xd9e - Management Engine Hash - // 0xdbe +RMOB, 32, // 0xdbe - RAM oops base address +RMOL, 32, // 0xdc2 - RAM oops length + // 0xdc6 diff --git a/src/vendorcode/google/chromeos/acpi/ramoops.asl b/src/vendorcode/google/chromeos/acpi/ramoops.asl new file mode 100644 index 0000000000..e43548933f --- /dev/null +++ b/src/vendorcode/google/chromeos/acpi/ramoops.asl @@ -0,0 +1,43 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +Scope (\_SB) +{ + Device(RMOP) + { + Name (_HID, "GOOG9999") + Name (_CID, "GOOG9999") + Name (_UID, 1) + + Name (RBUF, ResourceTemplate() + { + Memory32Fixed (ReadWrite, 0, 0, MRES) + }) + + Method (_CRS) + { + CreateDwordField (^RBUF, ^MRES._BAS, RBAS) + CreateDwordField (^RBUF, ^MRES._LEN, RLEN) + Store (\RMOB, RBAS) + Store (\RMOL, RLEN) + Return (^RBUF) + } + } +} -- cgit v1.2.3