From 0a65b738d590bb1ef8b51120681125ca40b1f6a9 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Tue, 7 Jul 2020 22:11:13 +0200 Subject: sb/intel/lynxpoint/pcie.c: Drop dead code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This code is not even being build-tested. Drop it before it grows moss. Change-Id: I2fff78231d6dfbed56bb885aa23d5cd2a745325e Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43217 Reviewed-by: HAOUAS Elyes Reviewed-by: Frans Hendriks Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/southbridge/intel/lynxpoint/pcie.c | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'src') diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c index d957e8d3c8..883dfc781b 100644 --- a/src/southbridge/intel/lynxpoint/pcie.c +++ b/src/southbridge/intel/lynxpoint/pcie.c @@ -670,17 +670,6 @@ static void pci_init(struct device *dev) reg16 |= PCI_BRIDGE_CTL_NO_ISA; pci_write_config16(dev, PCI_BRIDGE_CONTROL, reg16); -#ifdef EVEN_MORE_DEBUG - reg32 = pci_read_config32(dev, 0x20); - printk(BIOS_SPEW, " MBL = 0x%08x\n", reg32); - reg32 = pci_read_config32(dev, 0x24); - printk(BIOS_SPEW, " PMBL = 0x%08x\n", reg32); - reg32 = pci_read_config32(dev, 0x28); - printk(BIOS_SPEW, " PMBU32 = 0x%08x\n", reg32); - reg32 = pci_read_config32(dev, 0x2c); - printk(BIOS_SPEW, " PMLU32 = 0x%08x\n", reg32); -#endif - /* Clear errors in status registers */ reg16 = pci_read_config16(dev, 0x06); pci_write_config16(dev, 0x06, reg16); -- cgit v1.2.3