From 0f14df46aa8717097b032c24f8410e0520f5a755 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Tue, 30 Oct 2018 10:50:47 +0100 Subject: nb/intel/x4x/raminit: Add missing space MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TEST=Make the printk reachable, check with `strings build/cbfs/fallback/romstage.elf | grep lowest` that this patch changes "MHzas" to "MHz as". Change-Id: I42033d2f184e424818edf844cf6cf84ea07d7ed5 Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/29346 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/northbridge/intel/x4x/raminit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 80bde6c06c..ff1f970e2e 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -304,7 +304,7 @@ static void select_cas_dramfreq_ddr3(struct sysinfo *s, min_tCLK = MAX(min_tCLK, saved_timings->min_tclk); if (min_tCLK == 0) { printk(BIOS_ERR, "DRAM frequency is under lowest supported " - "frequency (400 MHz). Increasing to 400 MHz" + "frequency (400 MHz). Increasing to 400 MHz " "as last resort"); min_tCLK = TCK_400MHZ; } -- cgit v1.2.3