From 2671afcbbcf5bbf3391011b25509eadb4f5a16b7 Mon Sep 17 00:00:00 2001 From: Rajat Jain Date: Thu, 20 Jul 2017 19:31:01 -0700 Subject: mainboard/google/{poppy,soraka}: Enable S0ix Enable S0ix for poppy and soraka in their device trees respectively. BUG=b:36630881 BRANCH=none TEST=Verified S0ix and S3 operation on Poppy and Soraka (250+ iterations). Change-Id: I9ba91499e54f729970448af6f71804ad5b3cb836 Signed-off-by: Rajat Jain Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/20689 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/google/poppy/variants/baseboard/devicetree.cb | 3 +++ src/mainboard/google/poppy/variants/soraka/devicetree.cb | 3 +++ 2 files changed, 6 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 789b21a7fc..cabf3dea9a 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -24,6 +24,9 @@ chip soc/intel/skylake # Enable DPTF register "dptf_enable" = "1" + # Enable S0ix + register "s0ix_enable" = "1" + # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 9b8a18c2b0..3de9854bdc 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -24,6 +24,9 @@ chip soc/intel/skylake # Enable DPTF register "dptf_enable" = "1" + # Enable S0ix + register "s0ix_enable" = "1" + # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" -- cgit v1.2.3