From 33803aa04adfece6b7d576e2b2702d2131952928 Mon Sep 17 00:00:00 2001
From: Marshall Dawson <marshalldawson3rd@gmail.com>
Date: Wed, 6 Sep 2017 18:13:26 -0600
Subject: cpu/amd/amdfam15: Add misc. SMM definitions

Add a #define for TSEG as well as some register field definitions.

Change-Id: Iad702bbdb459a09f9fef60d8280bb2684e365f4b
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
 src/include/cpu/amd/amdfam15.h | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src')

diff --git a/src/include/cpu/amd/amdfam15.h b/src/include/cpu/amd/amdfam15.h
index ad3189f268..33aa863192 100644
--- a/src/include/cpu/amd/amdfam15.h
+++ b/src/include/cpu/amd/amdfam15.h
@@ -18,8 +18,12 @@
 
 #define MCI_STATUS			0x00000401
 #define MSR_SMM_BASE			0xC0010111
+#define MSR_TSEG_BASE			0xC0010112
 #define MSR_SMM_MASK			0xC0010113
+# define SMM_TSEG_VALID			(1 << 1)
+# define SMM_TSEG_WB			(6 << 12)
 #define HWCR_MSR			0xC0010015
+# define SMM_LOCK			(1 << 0)
 #define NB_CFG_MSR			0xC001001f
 
 #define PSTATE_0_MSR			0xC0010064
-- 
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