From 3892597349cdbdf5378718ceb03dbbc53f5d543a Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Wed, 8 Jun 2016 07:11:48 -0700 Subject: arch/x86: Enable SSE in bootblock_crt0.S Don't write reserved bits in the Quark platform. Follow the previous boot behavior and just enable SSE. TEST=Build and run on Galileo Gen2 Change-Id: Ib3143eff02b2610b595bd666c10d70e43103ccda Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/15128 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/arch/x86/bootblock_crt0.S | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S index 7292b8b17c..9fbce5dbb5 100644 --- a/src/arch/x86/bootblock_crt0.S +++ b/src/arch/x86/bootblock_crt0.S @@ -41,14 +41,10 @@ bootblock_protected_mode_entry: movd %eax, %mm1 movd %edx, %mm2 -#if !IS_ENABLED(CONFIG_SSE) +#if IS_ENABLED(CONFIG_SSE) enable_sse: - mov %cr0, %eax - and $~CR0_EM, %ax /* Clear coprocessor emulation CR0.EM */ - or $CR0_MP, %ax /* Set coprocessor monitoring CR0.MP */ - mov %eax, %cr0 mov %cr4, %eax - or $(CR4_OSFXSR | CR4_OSXMMEXCPT), %ax + or $CR4_OSFXSR, %ax mov %eax, %cr4 #endif /* IS_ENABLED(CONFIG_SSE) */ -- cgit v1.2.3