From 3e4e4c5f88dbb65e789410048bcb83fcdb30c989 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Fri, 10 Nov 2017 16:08:37 -0700 Subject: soc/amd/stoneyridge: Fix DRAM clear check Explicitly add #include files to romstage.c to ensure sizes of the devicetree structures are correct. The AMD support headers have an open #pragma pack(1) which causes structure sizes to change based on include ordering in different compilation units. More concretely, this fixes a bug where dev->chip_info is incorrectly detected as 0. Also shorten a printk string to bring the source line within 80 columns. Change-Id: I1ed51cdbb8df387a453de6cb944b90538dac4431 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/22424 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/romstage.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 06000ffd92..32dee5ab25 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -21,6 +21,8 @@ #include #include #include +#include +#include #include #include #include @@ -118,7 +120,7 @@ void SetMemParams(AMD_POST_PARAMS *PostParams) const struct device *dev = dev_find_slot(0, GNB_DEVFN); if (!dev || !dev->chip_info) { - printk(BIOS_ERR, "ERROR: Could not find SoC devicetree config\n"); + printk(BIOS_ERR, "ERROR: Cannot find SoC devicetree config\n"); /* In case of a BIOS error, only attempt to set UMA. */ PostParams->MemConfig.UmaMode = IS_ENABLED(CONFIG_GFXUMA) ? UMA_AUTO : UMA_NONE; -- cgit v1.2.3