From 50dd47bb58bee2ed159c1c5f6eb51dd583094f26 Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Fri, 26 Oct 2012 19:01:17 +0200 Subject: northbridge/sch: Read the GPU memory from the correct PCI device The GGC register which contains the size of memory that is used for GPU is in PCI device 2,0 and not 0,0. It is set to to 4MiB in src/mainboard/iwave/iWRainbowG6/romstage.c. Change-Id: Ie9f1cc60544ecd9cad770f34c83c33564a6129d4 Signed-off-by: Sebastian Andrzej Siewior Reviewed-on: http://review.coreboot.org/1628 Reviewed-by: Patrick Georgi Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) --- src/northbridge/intel/sch/northbridge.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c index fb3bff8492..4ca1248a0b 100644 --- a/src/northbridge/intel/sch/northbridge.c +++ b/src/northbridge/intel/sch/northbridge.c @@ -144,7 +144,7 @@ static void pci_domain_set_resources(device_t dev) tseg_memory_size = tseg_size * 1024ULL; } - reg16 = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0, 0)), GGC); + reg16 = pci_read_config16(dev_find_slot(0, PCI_DEVFN(2, 0)), GGC); if (!(reg16 & 2)) { int uma_size = 0; printk(BIOS_DEBUG, "IGD decoded, subtracting "); -- cgit v1.2.3