From 55d0ab5dc47cf319a71e1490ec93d88b2fb5cc2f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 12 Sep 2019 15:44:28 +0300 Subject: intel/broadwell: Replace some __PRE_RAM__ use MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Guards are required due to different PCI accessor signatures. Change-Id: I60e87f16a48565917f6ee9d05cc59d2b9373270c Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/35381 Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/intel/broadwell/pch.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c index e555588a2e..e6c231924a 100644 --- a/src/soc/intel/broadwell/pch.c +++ b/src/soc/intel/broadwell/pch.c @@ -73,7 +73,7 @@ u32 pch_read_soft_strap(int id) return SPIBAR32(SPIBAR_FDOD); } -#ifndef __PRE_RAM__ +#ifndef __SIMPLE_DEVICE__ /* Put device in D3Hot Power State */ static void pch_enable_d3hot(struct device *dev) -- cgit v1.2.3