From 56508967d8b433b2821d54207370332e1f319354 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Thu, 23 Aug 2018 14:48:06 +0200 Subject: siemens/mc_apl1: Disable PCI clock outputs on XIO bridge This patch disables the unused PCI clock outputs on the XIO2001 PCI Express to PCI Bridge. Change-Id: I0b9cf51a713f4ab46e71d250397486d136c26177 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/28284 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh --- src/include/device/pci_ids.h | 1 + src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c | 8 ++++++++ 2 files changed, 9 insertions(+) (limited to 'src') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 4ced4a5b27..bde150f304 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -782,6 +782,7 @@ #define PCI_VENDOR_ID_TI 0x104c #define PCI_DEVICE_ID_TI_TVP4010 0x3d04 #define PCI_DEVICE_ID_TI_TVP4020 0x3d07 +#define PCI_DEVICE_ID_TI_XIO2001 0x8240 #define PCI_DEVICE_ID_TI_1130 0xac12 #define PCI_DEVICE_ID_TI_1031 0xac13 #define PCI_DEVICE_ID_TI_1131 0xac15 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c index 540e322b95..da01ce3905 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c @@ -15,6 +15,8 @@ #include #include +#include +#include #include #include #include @@ -28,6 +30,7 @@ void variant_mainboard_final(void) { int status; + struct device *dev = NULL; /* * Set up the DP2LVDS converter. @@ -47,6 +50,11 @@ void variant_mainboard_final(void) * INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#-> PIRQA# */ pcr_write16(PID_ITSS, 0x314c, 0x0321); + + /* Disable clock outputs 1-5 (CLKOUT) for XIO2001 PCIe to PCI Bridge. */ + dev = dev_find_device(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XIO2001, 0); + if (dev) + pci_write_config8(dev, 0xd8, 0x3e); } static void wait_for_legacy_dev(void *unused) -- cgit v1.2.3