From 57ffeb0578db71b1c57d9e4137def42aac34fe18 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Wed, 30 Jul 2003 03:05:20 +0000 Subject: updates from YhLu, plus fixes for PPC/K8 issues. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/arch/i386/Config.lb | 2 +- src/arch/i386/boot/pirq_routing.c | 2 +- src/arch/i386/include/arch/smp/mpspec.h | 2 +- src/arch/i386/lib/c_start.S | 4 +-- src/arch/i386/lib/cpu.c | 4 +-- src/config/Config.lb | 4 +-- src/config/Options.lb | 12 ++++++++- src/console/console.c | 2 +- src/cpu/p5/cpuid.c | 4 +-- src/mainboard/tyan/s2880/Config.lb | 19 ++++++++------ src/mainboard/tyan/s2880/auto.c | 10 ++++---- src/mainboard/tyan/s2880/mainboard.c | 8 +++--- src/northbridge/amd/amdk8/raminit.c | 44 +++++++++++++++++++++++++++------ 13 files changed, 79 insertions(+), 38 deletions(-) (limited to 'src') diff --git a/src/arch/i386/Config.lb b/src/arch/i386/Config.lb index 14862b5a40..b43258b9d4 100644 --- a/src/arch/i386/Config.lb +++ b/src/arch/i386/Config.lb @@ -7,7 +7,7 @@ end makerule floppy depends "all" - action "mcopy -o romimage a:" + action "mcopy -o linuxbios.rom a:" end makerule nrv2b diff --git a/src/arch/i386/boot/pirq_routing.c b/src/arch/i386/boot/pirq_routing.c index 56d05c5d7f..40f64f2c45 100644 --- a/src/arch/i386/boot/pirq_routing.c +++ b/src/arch/i386/boot/pirq_routing.c @@ -2,7 +2,7 @@ #include #include -#ifdef DEBUG +#if DEBUG==1 void check_pirq_routing_table(void) { const uint8_t *addr; diff --git a/src/arch/i386/include/arch/smp/mpspec.h b/src/arch/i386/include/arch/smp/mpspec.h index 305276e482..96b2ab3e6b 100644 --- a/src/arch/i386/include/arch/smp/mpspec.h +++ b/src/arch/i386/include/arch/smp/mpspec.h @@ -1,7 +1,7 @@ #ifndef __ASM_MPSPEC_H #define __ASM_MPSPEC_H -#ifdef HAVE_MP_TABLE +#if HAVE_MP_TABLE==1 /* * Structure definitions for SMP machines following the diff --git a/src/arch/i386/lib/c_start.S b/src/arch/i386/lib/c_start.S index dfe57dd7f0..4c4146ec83 100644 --- a/src/arch/i386/lib/c_start.S +++ b/src/arch/i386/lib/c_start.S @@ -1,6 +1,6 @@ #include #include -#ifdef CONFIG_SMP +#if CONFIG_SMP==1 #include #endif .section ".text" @@ -39,7 +39,7 @@ _start: /* set new stack */ movl $_estack, %esp -#ifdef CONFIG_SMP +#if CONFIG_SMP==1 /* Get the cpu id */ movl $APIC_DEFAULT_BASE, %edi movl APIC_ID(%edi), %eax diff --git a/src/arch/i386/lib/cpu.c b/src/arch/i386/lib/cpu.c index 95dba5f8e5..baa029c02c 100644 --- a/src/arch/i386/lib/cpu.c +++ b/src/arch/i386/lib/cpu.c @@ -35,7 +35,7 @@ static void cache_on(struct mem_range *mem) * so absolute minimum needed to get it going. */ /* OK, linux it turns out does nothing. We have to do it ... */ -#if defined(i686) +#if i686==1 // totalram here is in linux sizing, i.e. units of KB. // set_mtrr is responsible for getting it into the right units! setup_mtrrs(mem); @@ -101,7 +101,7 @@ static void interrupts_on() apic_read(APIC_ID)); #else /* APIC */ -#ifdef i686 +#if i686==1 /* Only Pentium Pro and later have those MSR stuff */ msr_t msr; diff --git a/src/config/Config.lb b/src/config/Config.lb index 279fe8c9b8..ee617c9a60 100644 --- a/src/config/Config.lb +++ b/src/config/Config.lb @@ -7,7 +7,7 @@ makedefine LIBGCC_FILE_NAME := $(shell $(CC) -print-libgcc-file-name) makedefine GCC_INC_DIR := $(shell $(CC) -print-search-dirs | sed -ne "s/install: \(.*\)/\1include/gp") makedefine CPPFLAGS := -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS) -makedefine ROMCCPPFLAGS := -D__ROMCC__=0 -D__ROMCC_MINOR__=23 +makedefine ROMCCPPFLAGS := -D__ROMCC__=0 -D__ROMCC_MINOR__=34 makedefine CFLAGS := $(CPU_OPT) $(CPPFLAGS) -Os -nostdinc -nostdlib -fno-builtin -Wall makedefine HOSTCFLAGS:= -Os -Wall @@ -116,7 +116,7 @@ end makerule ./romcc depends "$(TOP)/util/romcc/romcc.c" - action "$(HOSTCC) -g $(HOSTCFLAGS) -DVERSION='\"0.21\"' -DRELEASE_DATE='\"7 april 2003\"' $< -o $@" + action "$(HOSTCC) -g $(HOSTCFLAGS) -DVERSION='\"0.34\"' -DRELEASE_DATE='\"4 July 2003\"' $< -o $@" end makerule build_opt_tbl diff --git a/src/config/Options.lb b/src/config/Options.lb index fdd87e56b7..6170ea28a1 100644 --- a/src/config/Options.lb +++ b/src/config/Options.lb @@ -121,6 +121,11 @@ define LINUXBIOS_VERSION export always comment "LinuxBIOS version" end +define LINUXBIOS_EXTRA_VERSION + default "" + export used + comment "LinuxBIOS extra version" +end define LINUXBIOS_BUILD default "$(shell date)" export always @@ -249,7 +254,7 @@ define HEAP_SIZE comment "Default heap size" end define _RAMBASE - default 0x4000 + default none format "0x%x" export always comment "Base address of LinuxBIOS in RAM" @@ -406,6 +411,11 @@ define CONFIG_SMP export always comment "Define if we support SMP" end +define CONFIG_MAX_CPUS + default 1 + export always + comment "Config CPU count for this machine" +end define MAX_CPUS default 1 export always diff --git a/src/console/console.c b/src/console/console.c index 0f6fb07406..5ec936d8ab 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -57,7 +57,7 @@ void console_tx_byte(unsigned char byte) */ void post_code(uint8_t value) { -#ifdef CONFIG_SERIAL_POST +#if CONFIG_SERIAL_POST==1 printk_info("POST: 0x%02x\n", value); #elsif !define(NO_POST) outb(value, 0x80); diff --git a/src/cpu/p5/cpuid.c b/src/cpu/p5/cpuid.c index 2d3d3a87b5..ab4a09d421 100644 --- a/src/cpu/p5/cpuid.c +++ b/src/cpu/p5/cpuid.c @@ -1,13 +1,13 @@ #include #include -#ifdef i586 +#if i586==1 #include #endif int mtrr_check(void) { -#ifdef i686 +#if i686==1 /* Only Pentium Pro and later have MTRR */ msr_t msr; printk_debug("\nMTRR check\n"); diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb index a83389f0c1..1b0552bf50 100644 --- a/src/mainboard/tyan/s2880/Config.lb +++ b/src/mainboard/tyan/s2880/Config.lb @@ -16,9 +16,11 @@ uses ARCH ### Build the objects we have code for in this directory. ### ##object mainboard.o -config chip.h -register "fixup_scsi" = "1" +#config chip.h +#register "fixup_scsi" = "1" + driver mainboard.o +driver lsi_scsi.o object static_devices.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end @@ -128,8 +130,9 @@ makerule ./auto.E action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" end makerule ./auto.inc - depends "./romcc ./auto.E" - action "./romcc -mcpu=k8 -O ./auto.E > auto.inc" + depends "./romcc ./auto.E" + action "./romcc -O -mcpu=k8 -o auto.inc --label-prefix=auto ./auto.E" +# action "./romcc -mcpu=k8 -O ./auto.E > auto.inc" end mainboardinit cpu/k8/enable_mmx_sse.inc mainboardinit ./auto.inc @@ -152,10 +155,10 @@ end southbridge amd/amd8131 end #mainboardinit archi386/smp/secondary.inc -superio NSC/pc87360 - register "com1" = "{1}" - register "lpt" = "{1}" -end +#superio NSC/pc87360 +# register "com1" = "{1}" +# register "lpt" = "{1}" +#end dir /pc80 ##dir /src/superio/winbond/w83627hf cpu p5 end diff --git a/src/mainboard/tyan/s2880/auto.c b/src/mainboard/tyan/s2880/auto.c index e09662223c..076bfffb2c 100644 --- a/src/mainboard/tyan/s2880/auto.c +++ b/src/mainboard/tyan/s2880/auto.c @@ -183,21 +183,21 @@ static void main(void) dump_pci_devices(); #endif #if 0 - dump_pci_device(PCI_DEV(0, 0x18, 2)); + dump_pci_device(PCI_DEV(0, 0x18, 1)); #endif /* Check all of memory */ #if 0 msr_t msr; - msr = rdmsr(TOP_MEM); - print_debug("TOP_MEM: "); + msr = rdmsr(TOP_MEM2); + print_debug("TOP_MEM2: "); print_debug_hex32(msr.hi); print_debug_hex32(msr.lo); print_debug("\r\n"); #endif /* -#if 1 - ram_check(0x00000000, msr.lo); +#if 0 + ram_check(0x00000000, msr.lo+(msr.hi<<32)); #else #if TOTAL_CPUS < 2 // Check 16MB of memory @ 0 diff --git a/src/mainboard/tyan/s2880/mainboard.c b/src/mainboard/tyan/s2880/mainboard.c index 7e037c5cd4..4c86db85ce 100644 --- a/src/mainboard/tyan/s2880/mainboard.c +++ b/src/mainboard/tyan/s2880/mainboard.c @@ -1,10 +1,10 @@ #include #include -#include +//#include #include #include #include -#include "chip.h" +//#include "chip.h" //#include //#include "lsi_scsi.c" unsigned long initial_apicid[MAX_CPUS] = @@ -105,7 +105,7 @@ static void onboard_scsi_fixup(void) */ } - +/* static void enable(struct chip *chip, enum chip_pass pass) { @@ -135,4 +135,4 @@ struct chip_control mainboard_tyan_s2880_control = { enable: enable, name: "Tyan s2880 mainboard " }; - +*/ diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index 6659641a1f..8ebf67965e 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -919,6 +919,12 @@ static void sdram_set_registers(const struct mem_controller *ctrl) * [31: 8] Reserved */ PCI_ADDR(0, 0x18, 3, 0x60), 0xffffff00, 0x00000000, +//BY LYH add IOMMU 64M APERTURE + PCI_ADDR(0, 0x18, 3, 0x94), 0xffff8000, 0x00000f70, + PCI_ADDR(0, 0x18, 3, 0x90), 0xffffff80, 0x00000002, + PCI_ADDR(0, 0x18, 3, 0x98), 0x0000000f, 0x00068300, + +//BY LYH END }; int i; int max; @@ -1116,7 +1122,23 @@ static void spd_set_ram_size(const struct mem_controller *ctrl) set_dimm_size(ctrl, sz, i); } } - +static void fill_last(unsigned long node_id,unsigned long base) +{ +//BY LYH //Fill next base reg with right value + unsigned i; + unsigned base_reg; + base &=0xffff0000; + device_t device; + for(device = PCI_DEV(0, 0x18, 1); device <= PCI_DEV(0, 0x1f, 1); device ++= PCI_DEV(0, 1, 0)) { + for(i=node_id+1;i<=7;i++) { + base_reg=0x40+(i<<3); + pci_write_config32(device,base_reg,base); + } + } +//BY LYH END +} + static void route_dram_accesses(const struct mem_controller *ctrl, unsigned long base_k, unsigned long limit_k) { @@ -1126,6 +1148,7 @@ static void route_dram_accesses(const struct mem_controller *ctrl, unsigned base; unsigned index; unsigned limit_reg, base_reg; + device_t device; node_id = ctrl->node_id; index = (node_id << 3); @@ -1143,6 +1166,7 @@ static void route_dram_accesses(const struct mem_controller *ctrl, pci_write_config32(device, limit_reg, limit); pci_write_config32(device, base_reg, base); } + } static void set_top_mem(unsigned tom_k) @@ -1251,9 +1275,9 @@ static void order_dimms(const struct mem_controller *ctrl) /* Recompute the cs base register value */ #if 1 // BY LYH Need to count from 0 for every memory controller csbase = ((tom - (base_k>>15))<< 21) | 1; - print_debug("csbase="); - print_debug_hex32(csbase); - print_debug("\r\n"); +// print_debug("csbase="); +// print_debug_hex32(csbase); +// print_debug("\r\n"); #else //BY LYH END csbase = (tom << 21) | 1; #endif @@ -1283,12 +1307,16 @@ static void order_dimms(const struct mem_controller *ctrl) print_debug("\r\n"); #endif route_dram_accesses(ctrl, base_k, tom_k); +//BY LYH + fill_last(ctrl->node_id, tom_k<<2); +//BY LYH END #if 0 //BY LYH - if(ctrl->node_id==1) { - pci_write_config32(ctrl->f2, DRAM_CSBASE, 0x00000001); - - } + dump_pci_device(PCI_DEV(0, 0x18, 1)); + +// if(ctrl->node_id==1) { +// pci_write_config32(ctrl->f2, DRAM_CSBASE, 0x00000001); +// } #endif set_top_mem(tom_k); -- cgit v1.2.3