From 688d004c4f8d94089c637be3a53ebdbb48493e97 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 24 May 2018 18:20:46 +0300 Subject: Remove leftover Intel CPU support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I6ac67137d5f5c63dbc4fc54eacb3e326ccf423d4 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26516 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/cpu/intel/Kconfig | 7 ------ src/cpu/intel/Makefile.inc | 8 ------- src/cpu/intel/slot_2/Kconfig | 22 ------------------ src/cpu/intel/slot_2/Makefile.inc | 24 ------------------- src/cpu/intel/slot_2/slot_2.c | 19 --------------- src/cpu/intel/socket_FC_PGA370/Kconfig | 33 -------------------------- src/cpu/intel/socket_FC_PGA370/Makefile.inc | 26 --------------------- src/cpu/intel/socket_PGA370/Kconfig | 36 ----------------------------- src/cpu/intel/socket_PGA370/Makefile.inc | 26 --------------------- src/cpu/intel/socket_mPGA478/Kconfig | 4 ---- 10 files changed, 205 deletions(-) delete mode 100644 src/cpu/intel/slot_2/Kconfig delete mode 100644 src/cpu/intel/slot_2/Makefile.inc delete mode 100644 src/cpu/intel/slot_2/slot_2.c delete mode 100644 src/cpu/intel/socket_FC_PGA370/Kconfig delete mode 100644 src/cpu/intel/socket_FC_PGA370/Makefile.inc delete mode 100644 src/cpu/intel/socket_PGA370/Kconfig delete mode 100644 src/cpu/intel/socket_PGA370/Makefile.inc delete mode 100644 src/cpu/intel/socket_mPGA478/Kconfig (limited to 'src') diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index 612b62e85b..a1f9dde0ab 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -22,21 +22,14 @@ source src/cpu/intel/model_f4x/Kconfig source src/cpu/intel/ep80579/Kconfig source src/cpu/intel/haswell/Kconfig # Sockets/Slots -source src/cpu/intel/slot_2/Kconfig source src/cpu/intel/slot_1/Kconfig source src/cpu/intel/socket_BGA956/Kconfig source src/cpu/intel/socket_BGA1284/Kconfig -source src/cpu/intel/socket_FC_PGA370/Kconfig source src/cpu/intel/socket_FCBGA559/Kconfig source src/cpu/intel/socket_FCBGA1023/Kconfig -source src/cpu/intel/socket_mFCBGA479/Kconfig source src/cpu/intel/socket_mFCPGA478/Kconfig -source src/cpu/intel/socket_mPGA478/Kconfig source src/cpu/intel/socket_mPGA478MN/Kconfig -source src/cpu/intel/socket_mPGA479M/Kconfig -source src/cpu/intel/socket_mPGA603/Kconfig source src/cpu/intel/socket_mPGA604/Kconfig -source src/cpu/intel/socket_PGA370/Kconfig source src/cpu/intel/socket_441/Kconfig source src/cpu/intel/socket_LGA1155/Kconfig source src/cpu/intel/socket_LGA775/Kconfig diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index fdd341a7bb..19e422f7fa 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -7,15 +7,11 @@ subdirs-$(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE) += fit subdirs-$(CONFIG_CPU_INTEL_SOCKET_441) += socket_441 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += socket_BGA956 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA1284) += socket_BGA1284 -subdirs-$(CONFIG_CPU_INTEL_SOCKET_FC_PGA370) += socket_FC_PGA370 subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA559) += socket_FCBGA559 subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA1023) += socket_FCBGA1023 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478 -subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478) += socket_mPGA478 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478MN) += socket_mPGA478MN -subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA603) += socket_mPGA603 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 -subdirs-$(CONFIG_CPU_INTEL_SOCKET_PGA370) += socket_PGA370 subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA988B) += socket_rPGA988B subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA989) += socket_rPGA989 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x @@ -25,10 +21,6 @@ subdirs-$(CONFIG_NORTHBRIDGE_INTEL_HASWELL) += haswell subdirs-$(CONFIG_NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE) += fsp_model_206ax subdirs-$(CONFIG_NORTHBRIDGE_INTEL_FSP_IVYBRIDGE) += fsp_model_206ax subdirs-$(CONFIG_NORTHBRIDGE_INTEL_FSP_RANGELEY) += fsp_model_406dx -subdirs-$(CONFIG_CPU_INTEL_SLOT_2) += slot_2 subdirs-$(CONFIG_CPU_INTEL_SLOT_1) += slot_1 subdirs-$(CONFIG_CPU_INTEL_SOCKET_LGA1155) += socket_LGA1155 subdirs-$(CONFIG_CPU_INTEL_SOCKET_LGA775) += socket_LGA775 - -#socket_mPGA604_533Mhz -#socket_mPGA604_800Mhz diff --git a/src/cpu/intel/slot_2/Kconfig b/src/cpu/intel/slot_2/Kconfig deleted file mode 100644 index 53f79adb52..0000000000 --- a/src/cpu/intel/slot_2/Kconfig +++ /dev/null @@ -1,22 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -config CPU_INTEL_SLOT_2 - bool - -config DCACHE_RAM_SIZE - hex - default 0x01000 - depends on CPU_INTEL_SLOT_2 diff --git a/src/cpu/intel/slot_2/Makefile.inc b/src/cpu/intel/slot_2/Makefile.inc deleted file mode 100644 index 642ef51ef1..0000000000 --- a/src/cpu/intel/slot_2/Makefile.inc +++ /dev/null @@ -1,24 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -ramstage-y += slot_2.c -subdirs-y += ../model_6xx -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode diff --git a/src/cpu/intel/slot_2/slot_2.c b/src/cpu/intel/slot_2/slot_2.c deleted file mode 100644 index de052118c3..0000000000 --- a/src/cpu/intel/slot_2/slot_2.c +++ /dev/null @@ -1,19 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - - -struct chip_operations cpu_intel_slot_2_ops = { - CHIP_NAME("Slot 2 CPU") -}; diff --git a/src/cpu/intel/socket_FC_PGA370/Kconfig b/src/cpu/intel/socket_FC_PGA370/Kconfig deleted file mode 100644 index a590e2c02a..0000000000 --- a/src/cpu/intel/socket_FC_PGA370/Kconfig +++ /dev/null @@ -1,33 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2010 Joseph Smith -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -config CPU_INTEL_SOCKET_FC_PGA370 - bool - select CPU_INTEL_MODEL_68X - select MMX - select SSE - -if CPU_INTEL_SOCKET_FC_PGA370 - -config DCACHE_RAM_BASE - hex - default 0xc8000 - -config DCACHE_RAM_SIZE - hex - default 0x08000 - -endif diff --git a/src/cpu/intel/socket_FC_PGA370/Makefile.inc b/src/cpu/intel/socket_FC_PGA370/Makefile.inc deleted file mode 100644 index c06082c5ee..0000000000 --- a/src/cpu/intel/socket_FC_PGA370/Makefile.inc +++ /dev/null @@ -1,26 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2010 Joseph Smith -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -subdirs-y += ../model_68x -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode - -cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc -romstage-y += ../car/romstage_legacy.c diff --git a/src/cpu/intel/socket_PGA370/Kconfig b/src/cpu/intel/socket_PGA370/Kconfig deleted file mode 100644 index b23308ce19..0000000000 --- a/src/cpu/intel/socket_PGA370/Kconfig +++ /dev/null @@ -1,36 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -config CPU_INTEL_SOCKET_PGA370 - bool - select CPU_INTEL_MODEL_6XX - select MMX - -if CPU_INTEL_SOCKET_PGA370 - -# Not all CPUs for Socket 370 can do SSE2 -config SSE2 - bool - default n - -config DCACHE_RAM_BASE - hex - default 0xcf000 - -config DCACHE_RAM_SIZE - hex - default 0x01000 - -endif diff --git a/src/cpu/intel/socket_PGA370/Makefile.inc b/src/cpu/intel/socket_PGA370/Makefile.inc deleted file mode 100644 index 9265ba458e..0000000000 --- a/src/cpu/intel/socket_PGA370/Makefile.inc +++ /dev/null @@ -1,26 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; either version 2 of the License, or -## (at your option) any later version. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -subdirs-y += ../model_6xx -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode - -cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc -romstage-y += ../car/romstage_legacy.c diff --git a/src/cpu/intel/socket_mPGA478/Kconfig b/src/cpu/intel/socket_mPGA478/Kconfig deleted file mode 100644 index 8c447c9930..0000000000 --- a/src/cpu/intel/socket_mPGA478/Kconfig +++ /dev/null @@ -1,4 +0,0 @@ -config CPU_INTEL_SOCKET_MPGA478 - bool - select CPU_INTEL_MODEL_69X - select CPU_INTEL_MODEL_6DX -- cgit v1.2.3